!_TAG_FILE_FORMAT	2	/extended format; --format=1 will not append ;" to lines/
!_TAG_FILE_SORTED	1	/0=unsorted, 1=sorted, 2=foldcase/
!_TAG_PROGRAM_AUTHOR	Darren Hiebert	/dhiebert@users.sourceforge.net/
!_TAG_PROGRAM_NAME	Exuberant Ctags	//
!_TAG_PROGRAM_URL	http://ctags.sourceforge.net	/official site/
!_TAG_PROGRAM_VERSION	5.6	//
AC2UP	ieee80211.h	1419;"	d
ACK_TIMEOUT	r8192U_hw.h	/^	ACK_TIMEOUT		= 0x04c, \/\/ Ack Timeout Register$/;"	e	enum:_RTL8192Usb_HW
ACT_ADDBAREQ	ieee80211.h	/^        ACT_ADDBAREQ = 0,$/;"	e	enum:_BA_ACTION
ACT_ADDBARSP	ieee80211.h	/^        ACT_ADDBARSP = 1,$/;"	e	enum:_BA_ACTION
ACT_ADDTSREQ	ieee80211.h	/^        ACT_ADDTSREQ = 0,$/;"	e	enum:_TS_ACTION
ACT_ADDTSRSP	ieee80211.h	/^        ACT_ADDTSRSP = 1,$/;"	e	enum:_TS_ACTION
ACT_ANTENNA_SELECT	r819xU_HTType.h	/^	ACT_ANTENNA_SELECT		= 9,$/;"	e	enum:_HT_ACTION
ACT_CATEGORY	ieee80211.h	/^} ACT_CATEGORY, *PACT_CATEGORY;$/;"	t	typeref:enum:_ACT_CATEGORY
ACT_CAT_BA	ieee80211.h	/^        ACT_CAT_BA  = 3,$/;"	e	enum:_ACT_CATEGORY
ACT_CAT_DLS	ieee80211.h	/^        ACT_CAT_DLS = 2,$/;"	e	enum:_ACT_CATEGORY
ACT_CAT_HT	ieee80211.h	/^        ACT_CAT_HT  = 7,$/;"	e	enum:_ACT_CATEGORY
ACT_CAT_QOS	ieee80211.h	/^        ACT_CAT_QOS = 1,$/;"	e	enum:_ACT_CATEGORY
ACT_CAT_WMM	ieee80211.h	/^        ACT_CAT_WMM = 17,$/;"	e	enum:_ACT_CATEGORY
ACT_DELBA	ieee80211.h	/^        ACT_DELBA    = 2,$/;"	e	enum:_BA_ACTION
ACT_DELTS	ieee80211.h	/^        ACT_DELTS    = 2,$/;"	e	enum:_TS_ACTION
ACT_MIMO_CHL_MEASURE	r819xU_HTType.h	/^	ACT_MIMO_CHL_MEASURE	= 4,$/;"	e	enum:_HT_ACTION
ACT_MIMO_COMPR_STEER	r819xU_HTType.h	/^	ACT_MIMO_COMPR_STEER		= 8,$/;"	e	enum:_HT_ACTION
ACT_MIMO_CSI_MATRICS	r819xU_HTType.h	/^	ACT_MIMO_CSI_MATRICS		= 6,$/;"	e	enum:_HT_ACTION
ACT_MIMO_NOCOMPR_STEER	r819xU_HTType.h	/^	ACT_MIMO_NOCOMPR_STEER	= 7,$/;"	e	enum:_HT_ACTION
ACT_MIMO_PWR_SAVE	r819xU_HTType.h	/^	ACT_MIMO_PWR_SAVE 		= 1,$/;"	e	enum:_HT_ACTION
ACT_PSMP	r819xU_HTType.h	/^	ACT_PSMP					= 2,$/;"	e	enum:_HT_ACTION
ACT_RECIPROCITY_CORRECT	r819xU_HTType.h	/^	ACT_RECIPROCITY_CORRECT	= 5,$/;"	e	enum:_HT_ACTION
ACT_RECOMMAND_WIDTH	r819xU_HTType.h	/^	ACT_RECOMMAND_WIDTH		= 0,$/;"	e	enum:_HT_ACTION
ACT_SCHEDULE	ieee80211.h	/^        ACT_SCHEDULE = 3,$/;"	e	enum:_TS_ACTION
ACT_SET_PCO_PHASE	r819xU_HTType.h	/^	ACT_SET_PCO_PHASE		= 3,$/;"	e	enum:_HT_ACTION
AC_PARAM_AIFS_OFFSET	r8192U_hw.h	117;"	d
AC_PARAM_ECW_MAX_OFFSET	r8192U_hw.h	115;"	d
AC_PARAM_ECW_MIN_OFFSET	r8192U_hw.h	116;"	d
AC_PARAM_TXOP_LIMIT_OFFSET	r8192U_hw.h	114;"	d
AES_11N_FIX	r8192U_hw.h	/^	AES_11N_FIX		= 0x173,$/;"	e	enum:_RTL8192Usb_HW
AFR	r8192U_hw.h	74;"	d
AFR_CLKRUN_SEL	r8192U_hw.h	76;"	d
AFR_CardBEn	r8192U_hw.h	75;"	d
AFR_FuncRegEn	r8192U_hw.h	77;"	d
AGC	ieee80211.h	/^	u8        AGC;$/;"	m	struct:ieee80211_rx_stats
AGCTAB_ArrayLength	r819xU_phy.h	11;"	d
AMPDU_Factor	r819xU_HTType.h	/^	u8				AMPDU_Factor;				\/\/ This indicate Tx A-MPDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
AMPDU_Factor	r819xU_HTType.h	/^	u8			AMPDU_Factor;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
AMSDU_MaxSize	r819xU_HTType.h	/^	u16			AMSDU_MaxSize;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
APPLIED_RESERVED_QUEUE_IN_FW	r8192U.h	497;"	d
ASCap	r819xU_HTType.h	/^	u8	ASCap;$/;"	m	struct:_HT_CAPABILITY_ELE
ATIMWND	r8192U_hw.h	/^	ATIMWND			= 0x072, \/\/ ATIM Window Size (TU)$/;"	e	enum:_RTL8192Usb_HW
AcmAvg	r8192U_hw.h	/^	AcmAvg			= 0x170, \/\/ ACM Average Period Register$/;"	e	enum:_RTL8192Usb_HW
AcmControl	r8192U.h	/^	u8	AcmControl;$/;"	m	struct:r8192_priv
AcmFwCtrl	r8192U_hw.h	/^	AcmFwCtrl		= 0x172, \/\/ ACM Firmware Control Register$/;"	e	enum:_RTL8192Usb_HW
AcmHwCtrl	r8192U_hw.h	/^	AcmHwCtrl		= 0x171, \/\/ ACM Hardware Control Register$/;"	e	enum:_RTL8192Usb_HW
AcmHw_BeqEn	r8192U_hw.h	239;"	d
AcmHw_BeqStatus	r8192U_hw.h	242;"	d
AcmHw_HwEn	r8192U_hw.h	238;"	d
AcmHw_ViqEn	r8192U_hw.h	240;"	d
AcmHw_ViqStatus	r8192U_hw.h	243;"	d
AcmHw_VoqEn	r8192U_hw.h	241;"	d
AcmHw_VoqStatus	r8192U_hw.h	244;"	d
ActSetWirelessMode8187	r8180_rtl8225z2.c	/^void ActSetWirelessMode8187(struct net_device* dev, u8	btWirelessMode)$/;"	f
ActUpdateChannelAccessSetting	r8180_rtl8225z2.c	/^void ActUpdateChannelAccessSetting(struct net_device *dev,$/;"	f
AdvCoding	r819xU_HTType.h	/^	u8	AdvCoding:1;$/;"	m	struct:_HT_CAPABILITY_ELE
AllowAggregation	r8192U.h	/^        u8		AllowAggregation:1;$/;"	m	struct:_tx_fwinfo_819x_usb
Antenna	ieee80211.h	/^	u16       Antenna:1;      \/\/for rtl8185$/;"	m	struct:ieee80211_rx_stats
AntennaA	r819xU_HTType.h	/^	u32	AntennaA;$/;"	m	struct:_MIMO_RSSI
AntennaB	r819xU_HTType.h	/^	u32 	AntennaB;$/;"	m	struct:_MIMO_RSSI
AntennaC	r819xU_HTType.h	/^	u32 	AntennaC;$/;"	m	struct:_MIMO_RSSI
AntennaD	r819xU_HTType.h	/^	u32 	AntennaD;$/;"	m	struct:_MIMO_RSSI
AntennaTxPwDiff	r8192U.h	/^	u8	AntennaTxPwDiff[2];				\/\/ Antenna gain offset, index 0 for B, 1 for C, and 2 for D$/;"	m	struct:r8192_priv
AsocRetryCount	ieee80211.h	/^	u8 AsocRetryCount;$/;"	m	struct:ieee80211_device
Average	r819xU_HTType.h	/^	u32	Average;$/;"	m	struct:_MIMO_RSSI
BA_ACTION	ieee80211.h	/^} BA_ACTION, *PBA_ACTION;$/;"	t	typeref:enum:_BA_ACTION
BB_ANTATTEN_CHAN14	r8192U_hw.h	64;"	d
BB_ANTENNA_B	r8192U_hw.h	65;"	d
BB_GLOBAL_RESET	r8192U_hw.h	/^	BB_GLOBAL_RESET		= 0x020, \/\/ BasebandGlobal Reset Register$/;"	e	enum:_RTL8192Usb_HW
BB_GLOBAL_RESET_BIT	r8192U_hw.h	123;"	d
BB_HOST_BANG	r8192U_hw.h	67;"	d
BB_HOST_BANG_CLK	r8192U_hw.h	69;"	d
BB_HOST_BANG_DATA	r8192U_hw.h	71;"	d
BB_HOST_BANG_EN	r8192U_hw.h	68;"	d
BB_HOST_BANG_RW	r8192U_hw.h	70;"	d
BB_REGISTER_DEFINITION_T	r8192U.h	/^}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;$/;"	t	typeref:struct:_BB_REGISTER_DEFINITION
BCN_DMATIME	r8192U_hw.h	/^	BCN_DMATIME		= 0x076, \/\/ Beacon DMA and ATIM interrupt time (US). Indicates the time before TBTT to perform beacon queue DMA$/;"	e	enum:_RTL8192Usb_HW
BCN_DRV_EARLY_INT	r8192U_hw.h	/^	BCN_DRV_EARLY_INT	= 0x074, \/\/ Driver Early Interrupt Time (TU). Time to send interrupt to notify to change beacon content before TBTT$/;"	e	enum:_RTL8192Usb_HW
BCN_ERR_THRESH	r8192U_hw.h	/^	BCN_ERR_THRESH		= 0x078, \/\/ Beacon Error Threshold$/;"	e	enum:_RTL8192Usb_HW
BCN_INTERVAL	r8192U_hw.h	/^	BCN_INTERVAL		= 0x070, \/\/ Beacon Interval (TU)$/;"	e	enum:_RTL8192Usb_HW
BCN_TCFG	r8192U_hw.h	/^	BCN_TCFG		= 0x062, \/\/ Beacon Time Configuration$/;"	e	enum:_RTL8192Usb_HW
BCN_TCFG_CW_SHIFT	r8192U_hw.h	181;"	d
BCN_TCFG_IFS	r8192U_hw.h	182;"	d
BEACON_PRIORITY	r8192U.h	/^	BEACON_PRIORITY, \/\/0x0A$/;"	e	enum:__anon15
BEACON_PROBE_SSID_ID_POSITION	ieee80211.h	1351;"	d
BEACON_QUEUE	ieee80211.h	73;"	d
BEAdmTime	r8192U_hw.h	/^	BEAdmTime		= 0x17C, \/\/ BE Queue Admitted Time Register$/;"	e	enum:_RTL8192Usb_HW
BEQDA	r8192U_hw.h	/^	BEQDA			= 0x21C, \/\/ BE Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
BE_PRIORITY	r8192U.h	/^	BE_PRIORITY,$/;"	e	enum:__anon15
BE_QUEUE	ieee80211.h	66;"	d
BIT0	r8192U.h	53;"	d
BIT1	r8192U.h	54;"	d
BIT10	r8192U.h	63;"	d
BIT11	r8192U.h	64;"	d
BIT12	r8192U.h	65;"	d
BIT13	r8192U.h	66;"	d
BIT14	r8192U.h	67;"	d
BIT15	r8192U.h	68;"	d
BIT16	r8192U.h	69;"	d
BIT17	r8192U.h	70;"	d
BIT18	r8192U.h	71;"	d
BIT19	r8192U.h	72;"	d
BIT2	r8192U.h	55;"	d
BIT20	r8192U.h	73;"	d
BIT21	r8192U.h	74;"	d
BIT22	r8192U.h	75;"	d
BIT23	r8192U.h	76;"	d
BIT24	r8192U.h	77;"	d
BIT25	r8192U.h	78;"	d
BIT26	r8192U.h	79;"	d
BIT27	r8192U.h	80;"	d
BIT28	r8192U.h	81;"	d
BIT29	r8192U.h	82;"	d
BIT3	r8192U.h	56;"	d
BIT30	r8192U.h	83;"	d
BIT31	r8192U.h	84;"	d
BIT4	r8192U.h	57;"	d
BIT5	r8192U.h	58;"	d
BIT6	r8192U.h	59;"	d
BIT7	r8192U.h	60;"	d
BIT8	r8192U.h	61;"	d
BIT9	r8192U.h	62;"	d
BKQDA	r8192U_hw.h	/^	BKQDA			= 0x220, \/\/ BK Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
BK_PRIORITY	r8192U.h	/^	BK_PRIORITY,$/;"	e	enum:__anon15
BK_QUEUE	ieee80211.h	65;"	d
BOTH_QUERY_CONFIG	r819xU_cmdpkt.h	/^    BOTH_QUERY_CONFIG			= 3,    $/;"	e	enum:tag_command_packet_directories
BQDA	r8192U_hw.h	/^	BQDA			= 0x200, \/\/ Beacon Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
BRSR_AckShortPmb	r8192U_hw.h	336;"	d
BSSIDR	r8192U_hw.h	/^	BSSIDR			= 0x02E, \/\/ BSSID Register$/;"	e	enum:_RTL8192Usb_HW
BSS_HT	r819xU_HTType.h	/^}BSS_HT, *PBSS_HT;$/;"	t	typeref:struct:_BSS_HT
BULK_PRIORITY	r8192U.h	/^	BULK_PRIORITY = 0x01,$/;"	e	enum:__anon15
BW	r8192U.h	/^	u8                  BW:1;$/;"	m	struct:rx_drvinfo_819x_usb
BW_AUTO_SWITCH_HIGH_LOW	r8192U_dm.h	31;"	d
BW_AUTO_SWITCH_LOW_HIGH	r8192U_dm.h	32;"	d
BW_OPMODE	r8192U_hw.h	/^	BW_OPMODE		= 0x300, \/\/ Bandwidth operation mode$/;"	e	enum:_RTL8192Usb_HW
BW_OPMODE_11J	r8192U_hw.h	293;"	d
BW_OPMODE_20MHZ	r8192U_hw.h	295;"	d
BW_OPMODE_5G	r8192U_hw.h	294;"	d
BaseBand_Config_AGC_TAB	r8192U_hw.h	/^	BaseBand_Config_AGC_TAB = 1,			\/\/Radio Path B$/;"	e	enum:_BaseBand_Config_Type
BaseBand_Config_PHY_REG	r8192U_hw.h	/^	BaseBand_Config_PHY_REG = 0,			\/\/Radio Path A$/;"	e	enum:_BaseBand_Config_Type
BaseBand_Config_Type	r8192U_hw.h	/^}BaseBand_Config_Type, *PBaseBand_Config_Type;$/;"	t	typeref:enum:_BaseBand_Config_Type
BasicMSC	r819xU_HTType.h	/^	u8	BasicMSC[16];$/;"	m	struct:_HT_INFORMATION_ELE
Bcast	r8192U.h	/^	u8                  Bcast:1;$/;"	m	struct:rx_drvinfo_819x_usb
BssQos	ieee80211.h	/^        BSS_QOS   BssQos;$/;"	m	struct:ieee80211_network
CAM_CONTENT_COUNT	r8192U_core.c	6207;"	d	file:
CARDBUS	r8192U.h	/^	enum card_type {PCI,MINIPCI,CARDBUS,USB\/*rtl8187*\/}card_type;$/;"	e	enum:r8192_priv::card_type
CC	Makefile	/^CC = gcc$/;"	m
CCKTxBBGainTableLength	r8192U.h	800;"	d
CCKTxPowerLevelOriginalOffset	r8192U.h	/^	u32	CCKTxPowerLevelOriginalOffset;$/;"	m	struct:r8192_priv
CCK_Rx_Version_1	r8192U_dm.h	/^	CCK_Rx_Version_1 = 0,	$/;"	e	enum:tag_CCK_Rx_Path_Method_Definition
CCK_Rx_Version_2	r8192U_dm.h	/^	CCK_Rx_Version_2= 1,$/;"	e	enum:tag_CCK_Rx_Path_Method_Definition
CCK_Rx_Version_MAX	r8192U_dm.h	/^	CCK_Rx_Version_MAX$/;"	e	enum:tag_CCK_Rx_Path_Method_Definition
CCK_TXAGC	r8192U_hw.h	/^	CCK_TXAGC		= 0x348, \/\/ CCK AGC$/;"	e	enum:_RTL8192Usb_HW
CCX_PERIOD	r8192U_hw.h	/^	CCX_PERIOD		= 0x250, \/\/ CCX Measurement Period Register, in unit of TU. $/;"	e	enum:_RTL8192Usb_HW
CFG_IEEE80211_COMPUTE_FCS	ieee80211.h	1578;"	d
CFG_IEEE80211_RESERVE_FCS	ieee80211.h	1577;"	d
CFG_IEEE80211_RTS	ieee80211.h	1579;"	d
CFLAGS	Makefile	/^CFLAGS := -O2 -DMODULE -D__KERNEL__ ${WARN} ${INCLUDE}$/;"	m
CHANNEL_ACCESS_SETTING	r8192U.h	/^}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;$/;"	t	typeref:struct:ChnlAccessSetting
CHHLOP_IN_PROGRESS	r819xU_HTType.h	86;"	d
CHNLOP	r819xU_HTType.h	/^} CHNLOP, *PCHNLOP;$/;"	t	typeref:enum:_CHNLOP
CHNLOP_NONE	r819xU_HTType.h	/^	CHNLOP_NONE = 0, \/\/ No Action now$/;"	e	enum:_CHNLOP
CHNLOP_SCAN	r819xU_HTType.h	/^	CHNLOP_SCAN = 1, \/\/ Scan in progress$/;"	e	enum:_CHNLOP
CHNLOP_SWBW	r819xU_HTType.h	/^	CHNLOP_SWBW = 2, \/\/ Bandwidth switching in progress$/;"	e	enum:_CHNLOP
CHNLOP_SWCHNL	r819xU_HTType.h	/^	CHNLOP_SWCHNL = 3, \/\/ Software Channel switching in progress$/;"	e	enum:_CHNLOP
CIS	r8180_93cx6.h	33;"	d
CLM_RESULT	r8192U_hw.h	/^	CLM_RESULT		= 0x251, \/\/ CCA Busy fraction register.$/;"	e	enum:_RTL8192Usb_HW
CMDR	r8192U_hw.h	/^	CMDR			= 0x037, \/\/ Command register$/;"	e	enum:_RTL8192Usb_HW
CMPK_BOTH_QUERY_CONFIG_SIZE	r819xU_cmdpkt.h	6;"	d
CMPK_DEBOUNCE_CNT	r819xU_cmdpkt.c	28;"	d	file:
CMPK_PRINT	r819xU_cmdpkt.c	30;"	d	file:
CMPK_RX_DBG_MSG_SIZE	r819xU_cmdpkt.h	8;"	d
CMPK_RX_TX_FB_SIZE	r819xU_cmdpkt.h	4;"	d
CMPK_RX_TX_STS_SIZE	r819xU_cmdpkt.h	7;"	d
CMPK_TX_RAHIS_SIZE	r819xU_cmdpkt.h	9;"	d
CMPK_TX_SET_CONFIG_SIZE	r819xU_cmdpkt.h	5;"	d
COMP_AMSDU	r8192U.h	135;"	d
COMP_CH	r8192U.h	121;"	d
COMP_DBG	r8192U.h	104;"	d
COMP_DIG	r8192U.h	119;"	d
COMP_DOWN	r8192U.h	139;"	d
COMP_EPROM	r8192U.h	112;"	d
COMP_ERR	r8192U.h	140;"	d
COMP_FIRMWARE	r8192U.h	133;"	d
COMP_HALDM	r8192U.h	124;"	d
COMP_HIPWR	r8192U.h	123;"	d
COMP_HT	r8192U.h	134;"	d
COMP_INIT	r8192U.h	105;"	d
COMP_IO	r8192U.h	110;"	d
COMP_LED	r8192U.h	126;"	d
COMP_PHY	r8192U.h	120;"	d
COMP_POWER	r8192U.h	111;"	d
COMP_POWER_TRACKING	r8192U.h	114;"	d
COMP_QOS	r8192U.h	116;"	d
COMP_RATE	r8192U.h	117;"	d
COMP_RATR	r8192U.h	137;"	d
COMP_RECV	r8192U.h	108;"	d
COMP_RESET	r8192U.h	138;"	d
COMP_RF	r8192U.h	127;"	d
COMP_RM	r8192U.h	118;"	d
COMP_RXDESC	r8192U.h	129;"	d
COMP_SEC	r8192U.h	125;"	d
COMP_SEND	r8192U.h	109;"	d
COMP_SWBW	r8192U.h	113;"	d
COMP_TRACE	r8192U.h	103;"	d
COMP_TURBO	r8192U.h	115;"	d
COMP_TXAGC	r8192U.h	122;"	d
CONFIG_IEEE80211_DEBUG	ieee80211.h	466;"	d
CONFIG_RTL8192_IO_MAP	r8192U_core.c	62;"	d	file:
CONF_WEP104	r8192U_wx.c	631;"	d	file:
CONF_WEP40	r8192U_wx.c	630;"	d	file:
CPU_CCK_LOOPBACK	r8192U_hw.h	203;"	d
CPU_CCK_LOOPBACK	r8192U_hw.h	217;"	d
CPU_GEN	r8192U_hw.h	/^	CPU_GEN			= 0x100, \/\/ CPU Reset Register$/;"	e	enum:_RTL8192Usb_HW
CPU_GEN_BB_RST	r8192U_hw.h	209;"	d
CPU_GEN_BB_RST	r8192U_hw.h	223;"	d
CPU_GEN_BOOT_RDY	r8192U_hw.h	206;"	d
CPU_GEN_BOOT_RDY	r8192U_hw.h	220;"	d
CPU_GEN_FIRMWARE_RESET	r8192U_hw.h	205;"	d
CPU_GEN_FIRMWARE_RESET	r8192U_hw.h	219;"	d
CPU_GEN_FIRM_RDY	r8192U_hw.h	207;"	d
CPU_GEN_FIRM_RDY	r8192U_hw.h	221;"	d
CPU_GEN_NO_LOOPBACK_MSK	r8192U_hw.h	211;"	d
CPU_GEN_NO_LOOPBACK_MSK	r8192U_hw.h	225;"	d
CPU_GEN_NO_LOOPBACK_SET	r8192U_hw.h	212;"	d
CPU_GEN_NO_LOOPBACK_SET	r8192U_hw.h	226;"	d
CPU_GEN_PUT_CODE_OK	r8192U_hw.h	208;"	d
CPU_GEN_PUT_CODE_OK	r8192U_hw.h	222;"	d
CPU_GEN_PWR_STB_CPU	r8192U_hw.h	210;"	d
CPU_GEN_PWR_STB_CPU	r8192U_hw.h	224;"	d
CPU_GEN_SYSTEM_RESET	r8192U_hw.h	204;"	d
CPU_GEN_SYSTEM_RESET	r8192U_hw.h	218;"	d
CPUcheck_firmware_ready	r819xU_firmware.c	/^bool CPUcheck_firmware_ready(struct net_device *dev)$/;"	f
CPUcheck_maincodeok_turnonCPU	r819xU_firmware.c	/^bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)$/;"	f
CQDA	r8192U_hw.h	/^	CQDA			= 0x208, \/\/ Command Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
CRC32	r8192U.h	/^	u16			CRC32:1;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
CRC32	r8192U.h	/^	u16                 CRC32:1;$/;"	m	struct:rx_desc_819x_usb
CRC_LENGTH	ieee80211.h	1185;"	d
CR_MulRW	r8192U_hw.h	130;"	d
CR_RE	r8192U_hw.h	128;"	d
CR_RST	r8192U_hw.h	127;"	d
CR_TE	r8192U_hw.h	129;"	d
CTSToSelfTH	ieee80211.h	/^	u8 	CTSToSelfTH;$/;"	m	struct:ieee80211_device
CTSToSelfTHVal	r8192U_dm.h	48;"	d
CWRR	r8192U_hw.h	/^	CWRR			= 0x060, \/\/ Contention Window Report Register$/;"	e	enum:_RTL8192Usb_HW
CWmaxIndex	r8192U.h	/^	u16 CWmaxIndex;$/;"	m	struct:ChnlAccessSetting
CWminIndex	r8192U.h	/^	u16 CWminIndex;$/;"	m	struct:ChnlAccessSetting
CamResetAllEntry	r8192U_core.c	/^void CamResetAllEntry(struct net_device *dev)$/;"	f
CckPwEnl	r8192U.h	/^	u8	CckPwEnl;$/;"	m	struct:r8192_priv
ChannelAccessSetting	r8192U.h	/^	struct 	ChnlAccessSetting  ChannelAccessSetting;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::ChnlAccessSetting
ChlWidth	r819xU_HTType.h	/^	u8	ChlWidth:1;$/;"	m	struct:_HT_CAPABILITY_ELE
ChnlAccessSetting	r8192U.h	/^typedef struct 	ChnlAccessSetting {$/;"	s
ChnlOp	r819xU_HTType.h	/^	CHNLOP				ChnlOp; \/\/ software switching channel in progress. By Bruce, 2008-02-15.$/;"	m	struct:_RT_HIGH_THROUGHPUT
Cmd9346CR_9356SEL	r8192U_hw.h	392;"	d
CmdID	r819xU_phy.h	/^	SwChnlCmdID	CmdID;$/;"	m	struct:_SwChnlCmd
CmdID_BBRegWrite10	r819xU_phy.h	/^	CmdID_BBRegWrite10,$/;"	e	enum:_SwChnlCmdID
CmdID_End	r819xU_phy.h	/^	CmdID_End,$/;"	e	enum:_SwChnlCmdID
CmdID_RF_WriteReg	r819xU_phy.h	/^	CmdID_RF_WriteReg,$/;"	e	enum:_SwChnlCmdID
CmdID_SetTxPowerLevel	r819xU_phy.h	/^	CmdID_SetTxPowerLevel,$/;"	e	enum:_SwChnlCmdID
CmdID_WritePortUchar	r819xU_phy.h	/^	CmdID_WritePortUchar,$/;"	e	enum:_SwChnlCmdID
CmdID_WritePortUlong	r819xU_phy.h	/^	CmdID_WritePortUlong,$/;"	e	enum:_SwChnlCmdID
CmdID_WritePortUshort	r819xU_phy.h	/^	CmdID_WritePortUshort,$/;"	e	enum:_SwChnlCmdID
CmdInit	r8192U.h	/^	u8	CmdInit:1;$/;"	m	struct:_tx_desc_cmd_819x_usb
CmdInit	r8192U.h	/^        u8	CmdInit:1;$/;"	m	struct:_tx_desc_819x_usb
Cnt_Crc8_fail	r819xU_HTType.h	/^	u32	Cnt_Crc8_fail;$/;"	m	struct:_FALSE_ALARM_STATISTICS
Cnt_Parity_Fail	r819xU_HTType.h	/^	u32	Cnt_Parity_Fail;$/;"	m	struct:_FALSE_ALARM_STATISTICS
Cnt_Rate_Illegal	r819xU_HTType.h	/^	u32    Cnt_Rate_Illegal;$/;"	m	struct:_FALSE_ALARM_STATISTICS
Cnt_all	r819xU_HTType.h	/^	u32	Cnt_all;$/;"	m	struct:_FALSE_ALARM_STATISTICS
ComputeTxTime	r8192U_core.c	/^u16 ComputeTxTime( $/;"	f
ContiuneDiffCount	r8192U.h	/^	u32	ContiuneDiffCount;$/;"	m	struct:r8192_priv
ControlChl	r819xU_HTType.h	/^	u8	ControlChl;$/;"	m	struct:_HT_INFORMATION_ELE
CrystalCap	r8192U.h	/^	u8	CrystalCap;						\/\/ CrystalCap.$/;"	m	struct:r8192_priv
CtsEnable	r8192U.h	/^        u8		CtsEnable:1;$/;"	m	struct:_tx_fwinfo_819x_usb
CurSTAExtChnlOffset	r819xU_HTType.h	/^	HT_EXTCHNL_OFFSET	CurSTAExtChnlOffset;$/;"	m	struct:_RT_HIGH_THROUGHPUT
CurrentAMPDUFactor	r819xU_HTType.h	/^	u8				CurrentAMPDUFactor;		\/\/ This indicate Tx A-MPDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
CurrentChannelBW	r8192U.h	/^	HT_CHANNEL_WIDTH		CurrentChannelBW;$/;"	m	struct:r8192_priv
CurrentMPDUDensity	r819xU_HTType.h	/^	u8				CurrentMPDUDensity;			\/\/ This indicate Tx A-MPDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
CurrentOpMode	r819xU_HTType.h	/^	u8				CurrentOpMode;$/;"	m	struct:_RT_HIGH_THROUGHPUT
CurrentShowTxate	r8192U.h	/^	u32	CurrentShowTxate;$/;"	m	struct:Stats
Current_Tx_Rate_Reg	r8192U_dm.h	57;"	d
CustomerID	r8192U.h	/^	RT_CUSTOMER_ID CustomerID;$/;"	m	struct:r8192_priv
DCMD_TXCMD_T	r8192U_dm.h	/^}DCMD_TXCMD_T, *PDCMD_TXCMD_T;$/;"	t	typeref:struct:tag_Tx_Config_Cmd_Format
DEBUG_EPROM	r8192U_core.c	44;"	d	file:
DEBUG_IRQ	r8192U_core.c	53;"	d	file:
DEBUG_IRQ_TASKLET	r8192U_core.c	58;"	d	file:
DEBUG_REGISTERS	r8192U_core.c	56;"	d	file:
DEBUG_RING	r8192U_core.c	57;"	d	file:
DEBUG_RX	r8192U_core.c	54;"	d	file:
DEBUG_RXALLOC	r8192U_core.c	55;"	d	file:
DEBUG_RX_FRAG	r8192U_core.c	50;"	d	file:
DEBUG_RX_SKB	r8192U_core.c	48;"	d	file:
DEBUG_RX_VERBOSE	r8192U_core.c	45;"	d	file:
DEBUG_TX	r8192U_core.c	52;"	d	file:
DEBUG_TX_ALLOC	r8192U_core.c	59;"	d	file:
DEBUG_TX_DESC	r8192U_core.c	60;"	d	file:
DEBUG_TX_DESC2	r8192U_core.c	42;"	d	file:
DEBUG_TX_FILLDESC	r8192U_core.c	51;"	d	file:
DEBUG_TX_FRAG	r8192U_core.c	49;"	d	file:
DEBUG_ZERO_RX	r8192U_core.c	47;"	d	file:
DEFAULT_BEACONINTERVAL	r8192U.h	515;"	d
DEFAULT_BEACON_ESSID	r8192U.h	516;"	d
DEFAULT_FRAG_THRESHOLD	r8192U.h	513;"	d
DEFAULT_FTS	ieee80211.h	1575;"	d
DEFAULT_MAX_SCAN_AGE	ieee80211.h	1574;"	d
DEFAULT_RETRY_DATA	r8192U.h	520;"	d
DEFAULT_RETRY_RTS	r8192U.h	519;"	d
DEFAULT_SSID	r8192U.h	518;"	d
DESC90_RATE11M	r8192U.h	187;"	d
DESC90_RATE12M	r8192U.h	190;"	d
DESC90_RATE18M	r8192U.h	191;"	d
DESC90_RATE1M	r8192U.h	184;"	d
DESC90_RATE24M	r8192U.h	192;"	d
DESC90_RATE2M	r8192U.h	185;"	d
DESC90_RATE36M	r8192U.h	193;"	d
DESC90_RATE48M	r8192U.h	194;"	d
DESC90_RATE54M	r8192U.h	195;"	d
DESC90_RATE5_5M	r8192U.h	186;"	d
DESC90_RATE6M	r8192U.h	188;"	d
DESC90_RATE9M	r8192U.h	189;"	d
DESC90_RATEMCS0	r8192U.h	196;"	d
DESC90_RATEMCS1	r8192U.h	197;"	d
DESC90_RATEMCS10	r8192U.h	206;"	d
DESC90_RATEMCS11	r8192U.h	207;"	d
DESC90_RATEMCS12	r8192U.h	208;"	d
DESC90_RATEMCS13	r8192U.h	209;"	d
DESC90_RATEMCS14	r8192U.h	210;"	d
DESC90_RATEMCS15	r8192U.h	211;"	d
DESC90_RATEMCS2	r8192U.h	198;"	d
DESC90_RATEMCS3	r8192U.h	199;"	d
DESC90_RATEMCS32	r8192U.h	212;"	d
DESC90_RATEMCS4	r8192U.h	200;"	d
DESC90_RATEMCS5	r8192U.h	201;"	d
DESC90_RATEMCS6	r8192U.h	202;"	d
DESC90_RATEMCS7	r8192U.h	203;"	d
DESC90_RATEMCS8	r8192U.h	204;"	d
DESC90_RATEMCS9	r8192U.h	205;"	d
DESC_PACKET_TYPE_INIT	r8192U.h	/^	DESC_PACKET_TYPE_INIT = 0,$/;"	e	enum:_desc_packet_type_e
DESC_PACKET_TYPE_NORMAL	r8192U.h	/^	DESC_PACKET_TYPE_NORMAL = 1,	$/;"	e	enum:_desc_packet_type_e
DIFS_Timer	r8192U.h	/^	u16 DIFS_Timer; $/;"	m	struct:ChnlAccessSetting
DIG_ALGO_BY_FALSE_ALARM	r8192U_dm.h	/^	DIG_ALGO_BY_FALSE_ALARM = 0,	$/;"	e	enum:tag_dig_algorithm_definition
DIG_ALGO_BY_RSSI	r8192U_dm.h	/^	DIG_ALGO_BY_RSSI	= 1,$/;"	e	enum:tag_dig_algorithm_definition
DIG_ALGO_MAX	r8192U_dm.h	/^	DIG_ALGO_MAX$/;"	e	enum:tag_dig_algorithm_definition
DIG_CONNECT	r8192U_dm.h	/^	DIG_CONNECT = 1,$/;"	e	enum:tag_dig_connect_definition
DIG_CONNECT_MAX	r8192U_dm.h	/^	DIG_CONNECT_MAX$/;"	e	enum:tag_dig_connect_definition
DIG_CS_MAX	r8192U_dm.h	/^	DIG_CS_MAX$/;"	e	enum:tag_dig_cck_cs_ratio_state_definition
DIG_CS_RATIO_HIGHER	r8192U_dm.h	/^	DIG_CS_RATIO_HIGHER = 1,$/;"	e	enum:tag_dig_cck_cs_ratio_state_definition
DIG_CS_RATIO_LOWER	r8192U_dm.h	/^	DIG_CS_RATIO_LOWER = 0,	$/;"	e	enum:tag_dig_cck_cs_ratio_state_definition
DIG_DBG_MAX	r8192U_dm.h	/^	DIG_DBG_MAX$/;"	e	enum:tag_dig_dbgmode_definition
DIG_DBG_OFF	r8192U_dm.h	/^	DIG_DBG_OFF = 0,	$/;"	e	enum:tag_dig_dbgmode_definition
DIG_DBG_ON	r8192U_dm.h	/^	DIG_DBG_ON = 1,$/;"	e	enum:tag_dig_dbgmode_definition
DIG_DISCONNECT	r8192U_dm.h	/^	DIG_DISCONNECT = 0,	$/;"	e	enum:tag_dig_connect_definition
DIG_OP_TYPE_MAX	r8192U_dm.h	/^	DIG_OP_TYPE_MAX$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_PD_AT_HIGH_POWER	r8192U_dm.h	/^	DIG_PD_AT_HIGH_POWER = 2,$/;"	e	enum:tag_dig_packetdetection_threshold_definition
DIG_PD_AT_LOW_POWER	r8192U_dm.h	/^	DIG_PD_AT_LOW_POWER = 0,	$/;"	e	enum:tag_dig_packetdetection_threshold_definition
DIG_PD_AT_NORMAL_POWER	r8192U_dm.h	/^	DIG_PD_AT_NORMAL_POWER = 1,$/;"	e	enum:tag_dig_packetdetection_threshold_definition
DIG_PD_MAX	r8192U_dm.h	/^	DIG_PD_MAX$/;"	e	enum:tag_dig_packetdetection_threshold_definition
DIG_TYPE_ALGORITHM	r8192U_dm.h	/^	DIG_TYPE_ALGORITHM				= 6,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_BACKOFF	r8192U_dm.h	/^	DIG_TYPE_BACKOFF					= 7,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_DBG_MODE	r8192U_dm.h	/^	DIG_TYPE_DBG_MODE				= 4,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_DISABLE	r8192U_dm.h	/^	DIG_TYPE_DISABLE 		= 30,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_ENABLE	r8192U_dm.h	/^	DIG_TYPE_ENABLE 		= 20,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_PWDB_FACTOR	r8192U_dm.h	/^	DIG_TYPE_PWDB_FACTOR			= 8,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_RSSI	r8192U_dm.h	/^	DIG_TYPE_RSSI						= 5,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_RX_GAIN_MAX	r8192U_dm.h	/^	DIG_TYPE_RX_GAIN_MAX				= 10,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_RX_GAIN_MIN	r8192U_dm.h	/^	DIG_TYPE_RX_GAIN_MIN				= 9,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_THRESH_HIGH	r8192U_dm.h	/^	DIG_TYPE_THRESH_HIGH	= 0,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_THRESH_HIGHPWR_HIGH	r8192U_dm.h	/^	DIG_TYPE_THRESH_HIGHPWR_HIGH	= 2,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_THRESH_HIGHPWR_LOW	r8192U_dm.h	/^	DIG_TYPE_THRESH_HIGHPWR_LOW	= 3,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DIG_TYPE_THRESH_LOW	r8192U_dm.h	/^	DIG_TYPE_THRESH_LOW	= 1,$/;"	e	enum:tag_dynamic_init_gain_operation_type_definition
DISFB	r8192U.h	/^	u8	DISFB:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
DISFB	r8192U.h	/^        u8	DISFB:1;$/;"	m	struct:_tx_desc_819x_usb
DL_not_allowed	ieee80211.h	/^	DL_not_allowed	= 0x30, \/\/ 48$/;"	e	enum:_ReasonCode
DMESG	r8192U.h	93;"	d
DMESGE	r8192U.h	95;"	d
DMESGW	r8192U.h	94;"	d
DM_CCK_Rx_Path_Method	r8192U_dm.h	/^}DM_CCK_Rx_Path_Method;$/;"	t	typeref:enum:tag_CCK_Rx_Path_Method_Definition
DM_DBG_E	r8192U_dm.h	/^}DM_DBG_E;$/;"	t	typeref:enum:tag_DM_DbgMode_Definition
DM_DBG_MAX	r8192U_dm.h	/^	DM_DBG_MAX$/;"	e	enum:tag_DM_DbgMode_Definition
DM_DBG_OFF	r8192U_dm.h	/^	DM_DBG_OFF = 0,	$/;"	e	enum:tag_DM_DbgMode_Definition
DM_DBG_ON	r8192U_dm.h	/^	DM_DBG_ON = 1,$/;"	e	enum:tag_DM_DbgMode_Definition
DM_DIG_BACKOFF	r8192U_dm.h	37;"	d
DM_DIG_HIGH_PWR_THRESH_HIGH	r8192U_dm.h	28;"	d
DM_DIG_HIGH_PWR_THRESH_LOW	r8192U_dm.h	29;"	d
DM_DIG_MAX	r8192U_dm.h	38;"	d
DM_DIG_MIN	r8192U_dm.h	39;"	d
DM_DIG_MIN_Netcore	r8192U_dm.h	40;"	d
DM_DIG_THRESH_HIGH	r8192U_dm.h	25;"	d
DM_DIG_THRESH_LOW	r8192U_dm.h	26;"	d
DM_RATR_STA_HIGH	r8192U_dm.h	/^	DM_RATR_STA_HIGH = 0,$/;"	e	enum:tag_dynamic_ratr_state_definition
DM_RATR_STA_LOW	r8192U_dm.h	/^	DM_RATR_STA_LOW = 2,$/;"	e	enum:tag_dynamic_ratr_state_definition
DM_RATR_STA_MAX	r8192U_dm.h	/^	DM_RATR_STA_MAX$/;"	e	enum:tag_dynamic_ratr_state_definition
DM_RATR_STA_MIDDLE	r8192U_dm.h	/^	DM_RATR_STA_MIDDLE = 1,$/;"	e	enum:tag_dynamic_ratr_state_definition
DM_RxPathSelTable	r8192U_dm.c	/^DRxPathSel	DM_RxPathSelTable;$/;"	v
DM_STA_DIG_MAX	r8192U_dm.h	/^	DM_STA_DIG_MAX$/;"	e	enum:tag_dynamic_init_gain_state_definition
DM_STA_DIG_OFF	r8192U_dm.h	/^	DM_STA_DIG_OFF = 0,	$/;"	e	enum:tag_dynamic_init_gain_state_definition
DM_STA_DIG_ON	r8192U_dm.h	/^	DM_STA_DIG_ON,		$/;"	e	enum:tag_dynamic_init_gain_state_definition
DM_check_fsync_time_interval	r8192U_dm.h	34;"	d
DRIVER_RSSI	r8192U_hw.h	/^	DRIVER_RSSI		= 0x32c,					\/\/ Driver tell Firmware current RSSI$/;"	e	enum:_RTL8192Usb_HW
DRV_NAME	r8192U_core.c	3595;"	d	file:
DRxPathSel	r8192U_dm.h	/^}DRxPathSel;$/;"	t	typeref:struct:_Dynamic_Rx_Path_Selection_
DUMMY_RX	r8192U_core.c	46;"	d	file:
DUMP_RX	r8192U_core.c	40;"	d	file:
DUMP_TX	r8192U_core.c	41;"	d	file:
DbgMode	r8192U_dm.h	/^	u8		DbgMode;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
Decrypted	ieee80211.h	/^	u16       Decrypted:1;    \/\/for rtl8185, rtl8187$/;"	m	struct:ieee80211_rx_stats
DefaultInitialGain	r8192U.h	/^	u8 DefaultInitialGain[4];$/;"	m	struct:r8192_priv
Default_Fsync	ieee80211.h	/^	Default_Fsync,$/;"	e	enum:_Fsync_State
DelayBA	r819xU_HTType.h	/^	u8	DelayBA:1;$/;"	m	struct:_HT_CAPABILITY_ELE
DrvAggrNum	ieee80211.h	/^        u8 DrvAggrNum;$/;"	m	struct:cb_desc
DrvAggr_Aggregation	r8192U_core.c	/^struct sk_buff *DrvAggr_Aggregation(struct net_device *dev, struct ieee80211_drv_agg_txb *pSendList)$/;"	f
DrvAggr_GetAggregatibleList	r8192U_core.c	/^u8 DrvAggr_GetAggregatibleList(struct net_device *dev, struct sk_buff *skb, $/;"	f
DrvAggr_PaddingAdd	r8192U_core.c	/^u16 DrvAggr_PaddingAdd(struct net_device *dev, struct sk_buff *skb)$/;"	f
DssCCk	r819xU_HTType.h	/^	u8	DssCCk:1;$/;"	m	struct:_HT_CAPABILITY_ELE
DualBeacon	r819xU_HTType.h	/^	u8	DualBeacon:1;$/;"	m	struct:_HT_INFORMATION_ELE
DualCTSProtect	r819xU_HTType.h	/^	u8	DualCTSProtect:1;$/;"	m	struct:_HT_INFORMATION_ELE
EAPOL_ENCAP_ASF_ALERT	ieee80211.h	/^	EAPOL_ENCAP_ASF_ALERT$/;"	e	enum:eap_type
EAPOL_KEY	ieee80211.h	/^	EAPOL_KEY,$/;"	e	enum:eap_type
EAPOL_LOGOFF	ieee80211.h	/^	EAPOL_LOGOFF,$/;"	e	enum:eap_type
EAPOL_START	ieee80211.h	/^	EAPOL_START,$/;"	e	enum:eap_type
EAP_PACKET	ieee80211.h	/^	EAP_PACKET = 0,$/;"	e	enum:eap_type
EDCAPARA_BE	r8192U_hw.h	/^	EDCAPARA_BE		= 0x050, \/\/ EDCA Parameter of AC BE$/;"	e	enum:_RTL8192Usb_HW
EDCAPARA_BK	r8192U_hw.h	/^	EDCAPARA_BK		= 0x054, \/\/ EDCA Parameter of AC BK$/;"	e	enum:_RTL8192Usb_HW
EDCAPARA_VI	r8192U_hw.h	/^	EDCAPARA_VI		= 0x05C, \/\/ EDCA Parameter of AC VI$/;"	e	enum:_RTL8192Usb_HW
EDCAPARA_VO	r8192U_hw.h	/^	EDCAPARA_VO		= 0x058, \/\/ EDCA Parameter of AC VO$/;"	e	enum:_RTL8192Usb_HW
EEPROMCrystalCap	r8192U.h	/^	u8 EEPROMCrystalCap;$/;"	m	struct:r8192_priv
EEPROMPwDiff	r8192U.h	/^	u8 EEPROMPwDiff;$/;"	m	struct:r8192_priv
EEPROMThermalMeter	r8192U.h	/^	u8 EEPROMThermalMeter;$/;"	m	struct:r8192_priv
EEPROMTxPowerDiff	r8192U.h	/^	u16 EEPROMTxPowerDiff;$/;"	m	struct:r8192_priv
EEPROMTxPowerLevelCCK	r8192U.h	/^	u8 EEPROMTxPowerLevelCCK;\/\/ CCK channel 1~14$/;"	m	struct:r8192_priv
EEPROMTxPowerLevelCCK_V1	r8192U.h	/^	u8 EEPROMTxPowerLevelCCK_V1[3];$/;"	m	struct:r8192_priv
EEPROMTxPowerLevelOFDM24G	r8192U.h	/^	u8 EEPROMTxPowerLevelOFDM24G[3]; \/\/ OFDM 2.4G channel 1~14$/;"	m	struct:r8192_priv
EEPROMTxPowerLevelOFDM5G	r8192U.h	/^	u8 EEPROMTxPowerLevelOFDM5G[24];	\/\/ OFDM 5G$/;"	m	struct:r8192_priv
EEPROM_CID_CAMEO	r8192U_hw.h	105;"	d
EEPROM_CID_DEFAULT	r8192U_hw.h	104;"	d
EEPROM_CID_DLINK	r8192U_hw.h	112;"	d
EEPROM_CID_NetCore	r8192U_hw.h	109;"	d
EEPROM_CID_Nettronix	r8192U_hw.h	110;"	d
EEPROM_CID_Pronet	r8192U_hw.h	111;"	d
EEPROM_CID_RUNTOP	r8192U_hw.h	106;"	d
EEPROM_CID_Senao	r8192U_hw.h	107;"	d
EEPROM_CID_TOSHIBA	r8192U_hw.h	108;"	d
EEPROM_CRC	r8192U_hw.h	102;"	d
EEPROM_ChannelPlan	r8192U_hw.h	100;"	d
EEPROM_CrystalCap	r8192U_hw.h	86;"	d
EEPROM_Customer_ID	r8192U_hw.h	99;"	d
EEPROM_Def_Ver	r8192U.h	/^	u8 EEPROM_Def_Ver;$/;"	m	struct:r8192_priv
EEPROM_Default_CrystalCap	r8192U_hw.h	97;"	d
EEPROM_Default_PwDiff	r8192U_hw.h	96;"	d
EEPROM_Default_ThermalMeter	r8192U_hw.h	95;"	d
EEPROM_Default_TxPower	r8192U_hw.h	98;"	d
EEPROM_Default_TxPowerDiff	r8192U_hw.h	94;"	d
EEPROM_IC_VER	r8192U_hw.h	101;"	d
EEPROM_NODE_ADDRESS_BYTE_0	r8192U_hw.h	81;"	d
EEPROM_PID	r8192U_hw.h	80;"	d
EEPROM_PwDiff	r8192U_hw.h	85;"	d
EEPROM_ThermalMeter	r8192U_hw.h	84;"	d
EEPROM_TxPowerDiff	r8192U_hw.h	83;"	d
EEPROM_TxPwIndex_CCK	r8192U_hw.h	88;"	d
EEPROM_TxPwIndex_CCK_V1	r8192U_hw.h	90;"	d
EEPROM_TxPwIndex_OFDM_24G	r8192U_hw.h	89;"	d
EEPROM_TxPwIndex_OFDM_24G_V1	r8192U_hw.h	91;"	d
EEPROM_TxPwIndex_Ver	r8192U_hw.h	92;"	d
EEPROM_VID	r8192U_hw.h	79;"	d
EIFS_Timer	r8192U.h	/^	u16 EIFS_Timer;$/;"	m	struct:ChnlAccessSetting
ENCRYPTION_MAX_OVERHEAD	r8192U.h	428;"	d
EPROM_93c46	r8192U.h	510;"	d
EPROM_93c56	r8192U.h	511;"	d
EPROM_ANAPARAM_ADDRHWORD	r8180_93cx6.h	22;"	d
EPROM_ANAPARAM_ADDRLWORD	r8180_93cx6.h	21;"	d
EPROM_CK_SHIFT	r8192U_hw.h	401;"	d
EPROM_CMD	r8192U_hw.h	/^	EPROM_CMD 		= 0xfe58, $/;"	e	enum:_RTL8192Usb_HW
EPROM_CMD_CONFIG	r8192U_hw.h	396;"	d
EPROM_CMD_LOAD	r8192U_hw.h	398;"	d
EPROM_CMD_NORMAL	r8192U_hw.h	397;"	d
EPROM_CMD_OPERATING_MODE_MASK	r8192U_hw.h	395;"	d
EPROM_CMD_OPERATING_MODE_SHIFT	r8192U_hw.h	394;"	d
EPROM_CMD_PROGRAM	r8192U_hw.h	399;"	d
EPROM_CMD_RESERVED_MASK	r8192U_hw.h	393;"	d
EPROM_CONFIG2	r8180_93cx6.h	28;"	d
EPROM_CS_SHIFT	r8192U_hw.h	400;"	d
EPROM_DELAY	r8180_93cx6.h	19;"	d
EPROM_RFCHIPID	r8180_93cx6.h	24;"	d
EPROM_RFCHIPID_RTL8225U	r8180_93cx6.h	26;"	d
EPROM_RF_PARAM	r8180_93cx6.h	27;"	d
EPROM_R_SHIFT	r8192U_hw.h	403;"	d
EPROM_TXPW0	r8180_93cx6.h	35;"	d
EPROM_TXPW1	r8180_93cx6.h	37;"	d
EPROM_TXPW2	r8180_93cx6.h	36;"	d
EPROM_TXPW_BASE	r8180_93cx6.h	25;"	d
EPROM_VERSION	r8180_93cx6.h	30;"	d
EPROM_W_SHIFT	r8192U_hw.h	402;"	d
ERP_BarkerPreambleMode	ieee80211.h	/^	ERP_BarkerPreambleMode = 0x04,$/;"	e	enum:_erp_t
ERP_NonERPpresent	ieee80211.h	/^	ERP_NonERPpresent	= 0x01,$/;"	e	enum:_erp_t
ERP_UseProtection	ieee80211.h	/^	ERP_UseProtection	= 0x02,$/;"	e	enum:_erp_t
ETHERNET_HEADER_SIZE	ieee80211.h	1426;"	d
ETHERTYPE_IP	ieee80211.h	1438;"	d
ETHERTYPE_PAE	ieee80211.h	1435;"	d
ETHER_ADDR_LEN	ieee80211.h	1425;"	d
ETH_P_80211_RAW	ieee80211.h	602;"	d
ETH_P_PAE	ieee80211.h	596;"	d
ETH_P_PREAUTH	ieee80211.h	599;"	d
EVM1	r819xU_HTType.h	/^	u32	EVM1;$/;"	m	struct:_MIMO_EVM
EVM2	r819xU_HTType.h	/^	u32    EVM2;$/;"	m	struct:_MIMO_EVM
E_FOR_TX_POWER_TRACK	r8192U_dm.h	51;"	d
EarlyRxThreshold	r8192U.h	/^	u16	EarlyRxThreshold;$/;"	m	struct:r8192_priv
Enable	r8192U_dm.h	/^	u8		Enable;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
EnableAntenna	r819xU_HTType.h	/^	u32	EnableAntenna;$/;"	m	struct:_MIMO_RSSI
EnableCPUDur	r8192U.h	/^        u8		EnableCPUDur:1;         \/\/Enable firmware to recalculate and assign packet duration$/;"	m	struct:_tx_fwinfo_819x_usb
EnableHWSecurityConfig8192	r8192U_core.c	/^void EnableHWSecurityConfig8192(struct net_device *dev)$/;"	f
ExtChlOffset	r819xU_HTType.h	/^	u8	ExtChlOffset:2;$/;"	m	struct:_HT_INFORMATION_ELE
ExtHTCapInfo	r819xU_HTType.h	/^	u16	ExtHTCapInfo;$/;"	m	struct:_HT_CAPABILITY_ELE
FALSE	r8192U.h	48;"	d
FALSE_ALARM_STATISTICS	r819xU_HTType.h	/^}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;$/;"	t	typeref:struct:_FALSE_ALARM_STATISTICS
FC_QOS_BIT	ieee80211.h	433;"	d
FW_INIT_STEP0_BOOT	r819xU_firmware.h	/^	FW_INIT_STEP0_BOOT = 0,$/;"	e	enum:_firmware_init_step
FW_INIT_STEP1_MAIN	r819xU_firmware.h	/^	FW_INIT_STEP1_MAIN = 1,$/;"	e	enum:_firmware_init_step
FW_INIT_STEP2_DATA	r819xU_firmware.h	/^	FW_INIT_STEP2_DATA = 2,$/;"	e	enum:_firmware_init_step
FW_SOURCE_HEADER_FILE	r8192U.h	/^	FW_SOURCE_HEADER_FILE = 1,		\/\/from header file$/;"	e	enum:_firmware_source
FW_SOURCE_IMG_FILE	r8192U.h	/^	FW_SOURCE_IMG_FILE = 0,$/;"	e	enum:_firmware_source
FW_STATUS_0_INIT	r8192U.h	/^	FW_STATUS_0_INIT = 0,$/;"	e	enum:_firmware_status
FW_STATUS_1_MOVE_BOOT_CODE	r8192U.h	/^	FW_STATUS_1_MOVE_BOOT_CODE = 1,$/;"	e	enum:_firmware_status
FW_STATUS_2_MOVE_MAIN_CODE	r8192U.h	/^	FW_STATUS_2_MOVE_MAIN_CODE = 2,$/;"	e	enum:_firmware_status
FW_STATUS_3_TURNON_CPU	r8192U.h	/^	FW_STATUS_3_TURNON_CPU = 3,$/;"	e	enum:_firmware_status
FW_STATUS_4_MOVE_DATA_CODE	r8192U.h	/^	FW_STATUS_4_MOVE_DATA_CODE = 4,$/;"	e	enum:_firmware_status
FW_STATUS_5_READY	r8192U.h	/^	FW_STATUS_5_READY = 5,$/;"	e	enum:_firmware_status
FirstAGGR	r8192U.h	/^	u16                 FirstAGGR:1;$/;"	m	struct:rx_drvinfo_819x_usb
FirstSeg	r8192U.h	/^	u8	FirstSeg:1;$/;"	m	struct:_tx_desc_cmd_819x_usb
FirstSeg	r8192U.h	/^        u8	FirstSeg:1;$/;"	m	struct:_tx_desc_819x_usb
ForcedAMPDUFactor	r819xU_HTType.h	/^	u8				ForcedAMPDUFactor;$/;"	m	struct:_RT_HIGH_THROUGHPUT
ForcedAMPDUMode	r819xU_HTType.h	/^	HT_AGGRE_MODE_E	ForcedAMPDUMode;$/;"	m	struct:_RT_HIGH_THROUGHPUT
ForcedAMSDUMaxSize	r819xU_HTType.h	/^	u16				ForcedAMSDUMaxSize;$/;"	m	struct:_RT_HIGH_THROUGHPUT
ForcedAMSDUMode	r819xU_HTType.h	/^	HT_AGGRE_MODE_E	ForcedAMSDUMode;$/;"	m	struct:_RT_HIGH_THROUGHPUT
ForcedMPDUDensity	r819xU_HTType.h	/^	u8				ForcedMPDUDensity;$/;"	m	struct:_RT_HIGH_THROUGHPUT
ForcedPriority	ieee80211.h	/^	u8				ForcedPriority;		\/\/ Force per-packet priority 1~7. (default: 0, not to force it.)$/;"	m	struct:ieee80211_device
Frame_Order	ieee80211.h	438;"	d
Frame_QoSTID	ieee80211.h	/^static inline u8 Frame_QoSTID(u8* buf)$/;"	f
Fsync_State	ieee80211.h	/^}Fsync_State;	$/;"	t	typeref:enum:_Fsync_State
GET_COMMAND_PACKET_FRAG_THRESHOLD	r819xU_firmware.h	12;"	d
GPE	r8192U_hw.h	745;"	d
GPI	r8192U_hw.h	743;"	d
GPO	r8192U_hw.h	744;"	d
GetNmodeSupportBySecCfg	ieee80211.h	/^	bool (*GetNmodeSupportBySecCfg)(struct net_device* dev);$/;"	m	struct:ieee80211_device
GetNmodeSupportBySecCfg8192	r8192U_core.c	/^bool GetNmodeSupportBySecCfg8192(struct net_device*dev)$/;"	f
GetRxPacketShiftBytes819xUsb	r8192U_core.c	/^u32 GetRxPacketShiftBytes819xUsb(struct ieee80211_rx_stats  *Status, bool bIsRxAggrSubframe)$/;"	f
GetSupportedWirelessMode8187	r8180_rtl8225z2.c	/^u8 GetSupportedWirelessMode8187(struct net_device* dev)$/;"	f
GreenField	r819xU_HTType.h	/^	u8	GreenField:1;$/;"	m	struct:_HT_CAPABILITY_ELE
HAL_PRIME_CHNL_OFFSET_DONT_CARE	r8192U.h	724;"	d
HAL_PRIME_CHNL_OFFSET_LOWER	r8192U.h	725;"	d
HAL_PRIME_CHNL_OFFSET_UPPER	r8192U.h	726;"	d
HCCAQDA	r8192U_hw.h	/^	HCCAQDA			= 0x210, \/\/ HCCA Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
HCCA_QUEUE	ieee80211.h	69;"	d
HIGH_PRIORITY	r8192U.h	/^	HIGH_PRIORITY,$/;"	e	enum:__anon15
HIGH_QUEUE	ieee80211.h	72;"	d
HQDA	r8192U_hw.h	/^	HQDA			= 0x204, \/\/ High Priority Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
HTCurrentOperaRate	ieee80211.h	/^	u8				HTCurrentOperaRate;$/;"	m	struct:ieee80211_device
HTHighestOperaRate	ieee80211.h	/^	u8				HTHighestOperaRate;$/;"	m	struct:ieee80211_device
HTHighestOperaRate	r819xU_HTType.h	/^	u8			HTHighestOperaRate;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
HT_ACTION	r819xU_HTType.h	/^} HT_ACTION, *PHT_ACTION;$/;"	t	typeref:enum:_HT_ACTION
HT_AGGRE_MODE_E	r819xU_HTType.h	/^}HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E;$/;"	t	typeref:enum:_HT_AGGRE_MODE_E
HT_AGG_AUTO	r819xU_HTType.h	/^	HT_AGG_AUTO = 0,$/;"	e	enum:_HT_AGGRE_MODE_E
HT_AGG_FORCE_DISABLE	r819xU_HTType.h	/^	HT_AGG_FORCE_DISABLE = 2,$/;"	e	enum:_HT_AGGRE_MODE_E
HT_AGG_FORCE_ENABLE	r819xU_HTType.h	/^	HT_AGG_FORCE_ENABLE = 1,$/;"	e	enum:_HT_AGGRE_MODE_E
HT_BW40_SC_E	r819xU_HTType.h	/^}HT_BW40_SC_E;$/;"	t	typeref:enum:_HT_Bandwidth_40MHZ_Sub_Carrier
HT_CAPABILITY_ELE	r819xU_HTType.h	/^}__attribute__((packed)) HT_CAPABILITY_ELE, *PHT_CAPABILITY_ELE;$/;"	t	typeref:struct:_HT_CAPABILITY_ELE
HT_CHANNEL_WIDTH	r819xU_HTType.h	/^}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;$/;"	t	typeref:enum:_HT_CHANNEL_WIDTH
HT_CHANNEL_WIDTH_20	r819xU_HTType.h	/^	HT_CHANNEL_WIDTH_20 = 0,$/;"	e	enum:_HT_CHANNEL_WIDTH
HT_CHANNEL_WIDTH_20_40	r819xU_HTType.h	/^	HT_CHANNEL_WIDTH_20_40 = 1,$/;"	e	enum:_HT_CHANNEL_WIDTH
HT_EXTCHNL_OFFSET	r819xU_HTType.h	/^}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET;$/;"	t	typeref:enum:_HT_EXTCHNL_OFFSET
HT_EXTCHNL_OFFSET_LOWER	r819xU_HTType.h	/^	HT_EXTCHNL_OFFSET_LOWER = 3,$/;"	e	enum:_HT_EXTCHNL_OFFSET
HT_EXTCHNL_OFFSET_NO_DEF	r819xU_HTType.h	/^	HT_EXTCHNL_OFFSET_NO_DEF = 2,$/;"	e	enum:_HT_EXTCHNL_OFFSET
HT_EXTCHNL_OFFSET_NO_EXT	r819xU_HTType.h	/^	HT_EXTCHNL_OFFSET_NO_EXT = 0,$/;"	e	enum:_HT_EXTCHNL_OFFSET
HT_EXTCHNL_OFFSET_UPPER	r819xU_HTType.h	/^	HT_EXTCHNL_OFFSET_UPPER = 1,$/;"	e	enum:_HT_EXTCHNL_OFFSET
HT_INFORMATION_ELE	r819xU_HTType.h	/^}__attribute__((packed)) HT_INFORMATION_ELE, *PHT_INFORMATION_ELE;$/;"	t	typeref:struct:_HT_INFORMATION_ELE
HT_IOT_ACTION_E	r819xU_HTGen.h	/^}HT_IOT_ACTION_E, *PHT_IOT_ACTION_E;$/;"	t	typeref:enum:_HT_IOT_ACTION
HT_IOT_ACT_CDD_FSYNC	r819xU_HTGen.h	/^	HT_IOT_ACT_CDD_FSYNC = 0x00000020,$/;"	e	enum:_HT_IOT_ACTION
HT_IOT_ACT_DECLARE_MCS13	r819xU_HTGen.h	/^	HT_IOT_ACT_DECLARE_MCS13 = 0x00000004,$/;"	e	enum:_HT_IOT_ACTION
HT_IOT_ACT_DISABLE_EDCA_TURBO	r819xU_HTGen.h	/^	HT_IOT_ACT_DISABLE_EDCA_TURBO = 0x00000008,$/;"	e	enum:_HT_IOT_ACTION
HT_IOT_ACT_MGNT_USE_CCK_6M	r819xU_HTGen.h	/^	HT_IOT_ACT_MGNT_USE_CCK_6M = 0x00000010,$/;"	e	enum:_HT_IOT_ACTION
HT_IOT_ACT_PURE_N_MODE	r819xU_HTGen.h	/^	HT_IOT_ACT_PURE_N_MODE = 0x00000040,$/;"	e	enum:_HT_IOT_ACTION
HT_IOT_ACT_TX_USE_AMSDU_4K	r819xU_HTGen.h	/^	HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001,$/;"	e	enum:_HT_IOT_ACTION
HT_IOT_ACT_TX_USE_AMSDU_8K	r819xU_HTGen.h	/^	HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002,	$/;"	e	enum:_HT_IOT_ACTION
HT_MCS0	r819xU_HTType.h	/^	HT_MCS0   = 0x00000001,$/;"	e	enum:_HT_MCS_RATE
HT_MCS1	r819xU_HTType.h	/^	HT_MCS1   = 0x00000002,$/;"	e	enum:_HT_MCS_RATE
HT_MCS10	r819xU_HTType.h	/^	HT_MCS10 = 0x00000400,$/;"	e	enum:_HT_MCS_RATE
HT_MCS11	r819xU_HTType.h	/^	HT_MCS11 = 0x00000800,$/;"	e	enum:_HT_MCS_RATE
HT_MCS12	r819xU_HTType.h	/^	HT_MCS12 = 0x00001000,$/;"	e	enum:_HT_MCS_RATE
HT_MCS13	r819xU_HTType.h	/^	HT_MCS13 = 0x00002000,$/;"	e	enum:_HT_MCS_RATE
HT_MCS14	r819xU_HTType.h	/^	HT_MCS14 = 0x00004000,$/;"	e	enum:_HT_MCS_RATE
HT_MCS15	r819xU_HTType.h	/^	HT_MCS15 = 0x00008000,	$/;"	e	enum:_HT_MCS_RATE
HT_MCS2	r819xU_HTType.h	/^	HT_MCS2   = 0x00000004,$/;"	e	enum:_HT_MCS_RATE
HT_MCS3	r819xU_HTType.h	/^	HT_MCS3   = 0x00000008,$/;"	e	enum:_HT_MCS_RATE
HT_MCS4	r819xU_HTType.h	/^	HT_MCS4   = 0x00000010,$/;"	e	enum:_HT_MCS_RATE
HT_MCS5	r819xU_HTType.h	/^	HT_MCS5   = 0x00000020,$/;"	e	enum:_HT_MCS_RATE
HT_MCS6	r819xU_HTType.h	/^	HT_MCS6   = 0x00000040,$/;"	e	enum:_HT_MCS_RATE
HT_MCS7	r819xU_HTType.h	/^	HT_MCS7   = 0x00000080,$/;"	e	enum:_HT_MCS_RATE
HT_MCS8	r819xU_HTType.h	/^	HT_MCS8   = 0x00000100,$/;"	e	enum:_HT_MCS_RATE
HT_MCS9	r819xU_HTType.h	/^	HT_MCS9   = 0x00000200,$/;"	e	enum:_HT_MCS_RATE
HT_MCS_RATE	r819xU_HTType.h	/^}HT_MCS_RATE,*PHT_MCS_RATE;$/;"	t	typeref:enum:_HT_MCS_RATE
HT_OPMODE_40MHZ_PROTECT	r819xU_HTType.h	15;"	d
HT_OPMODE_MIXED	r819xU_HTType.h	16;"	d
HT_OPMODE_NO_PROTECT	r819xU_HTType.h	13;"	d
HT_OPMODE_OPTIONAL	r819xU_HTType.h	14;"	d
HT_SPEC_VER	r819xU_HTType.h	/^}HT_SPEC_VER, *PHT_SPEC_VER;$/;"	t	typeref:enum:_HT_SPEC_VER
HT_SPEC_VER_EWC	r819xU_HTType.h	/^	HT_SPEC_VER_EWC = 1,$/;"	e	enum:_HT_SPEC_VER
HT_SPEC_VER_IEEE	r819xU_HTType.h	/^	HT_SPEC_VER_IEEE = 0,$/;"	e	enum:_HT_SPEC_VER
HT_SUPPORTED_MCS_1SS_2SS_BITMAP	r819xU_HTType.h	36;"	d
HT_SUPPORTED_MCS_1SS_BITMAP	r819xU_HTType.h	34;"	d
HT_SUPPORTED_MCS_2SS_BITMAP	r819xU_HTType.h	35;"	d
HW90_BLOCK_E	r819xU_phy.h	/^}HW90_BLOCK_E, *PHW90_BLOCK_E;$/;"	t	typeref:enum:_HW90_BLOCK
HW90_BLOCK_MAC	r819xU_phy.h	/^	HW90_BLOCK_MAC = 0,$/;"	e	enum:_HW90_BLOCK
HW90_BLOCK_MAXIMUM	r819xU_phy.h	/^	HW90_BLOCK_MAXIMUM = 4, \/\/ Never use this$/;"	e	enum:_HW90_BLOCK
HW90_BLOCK_PHY0	r819xU_phy.h	/^	HW90_BLOCK_PHY0 = 1,$/;"	e	enum:_HW90_BLOCK
HW90_BLOCK_PHY1	r819xU_phy.h	/^	HW90_BLOCK_PHY1 = 2,$/;"	e	enum:_HW90_BLOCK
HW90_BLOCK_RF	r819xU_phy.h	/^	HW90_BLOCK_RF = 3,$/;"	e	enum:_HW90_BLOCK
HW_Fsync	ieee80211.h	/^	HW_Fsync,$/;"	e	enum:_Fsync_State
HW_LED	r8192U.h	/^	HW_LED, \/\/ HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)$/;"	e	enum:_LED_STRATEGY_8190
HwRateToMRate90	r8192U_core.c	/^u8 HwRateToMRate90(bool bIsHT, u8 rate)$/;"	f
ICV	r8192U.h	/^	u16			ICV:1;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
ICV	r8192U.h	/^	u16                 ICV:1;$/;"	m	struct:rx_desc_819x_usb
IEEE80211_1ADDR_LEN	ieee80211.h	358;"	d
IEEE80211_24GHZ_BAND	ieee80211.h	725;"	d
IEEE80211_24GHZ_CHANNELS	ieee80211.h	1583;"	d
IEEE80211_24GHZ_MAX_CHANNEL	ieee80211.h	1582;"	d
IEEE80211_24GHZ_MIN_CHANNEL	ieee80211.h	1581;"	d
IEEE80211_2ADDR_LEN	ieee80211.h	359;"	d
IEEE80211_3ADDR_LEN	ieee80211.h	360;"	d
IEEE80211_4ADDR_LEN	ieee80211.h	361;"	d
IEEE80211_52GHZ_BAND	ieee80211.h	726;"	d
IEEE80211_52GHZ_CHANNELS	ieee80211.h	1588;"	d
IEEE80211_52GHZ_MAX_CHANNEL	ieee80211.h	1587;"	d
IEEE80211_52GHZ_MIN_CHANNEL	ieee80211.h	1586;"	d
IEEE80211_ASSOCIATED	ieee80211.h	/^        IEEE80211_ASSOCIATED,$/;"	e	enum:ieee80211_state
IEEE80211_ASSOCIATING	ieee80211.h	/^	IEEE80211_ASSOCIATING,$/;"	e	enum:ieee80211_state
IEEE80211_ASSOCIATING	ieee80211.h	/^        IEEE80211_ASSOCIATING,$/;"	e	enum:ieee80211_state
IEEE80211_ASSOCIATING_AUTHENTICATED	ieee80211.h	/^	IEEE80211_ASSOCIATING_AUTHENTICATED,$/;"	e	enum:ieee80211_state
IEEE80211_ASSOCIATING_AUTHENTICATING	ieee80211.h	/^	IEEE80211_ASSOCIATING_AUTHENTICATING,$/;"	e	enum:ieee80211_state
IEEE80211_ASSOCIATING_RETRY	ieee80211.h	/^	IEEE80211_ASSOCIATING_RETRY,$/;"	e	enum:ieee80211_state
IEEE80211_AUTHENTICATED	ieee80211.h	/^        IEEE80211_AUTHENTICATED,$/;"	e	enum:ieee80211_state
IEEE80211_AUTHENTICATING	ieee80211.h	/^        IEEE80211_AUTHENTICATING,$/;"	e	enum:ieee80211_state
IEEE80211_BASIC_RATE_MASK	ieee80211.h	742;"	d
IEEE80211_CCK_BASIC_RATES_MASK	ieee80211.h	758;"	d
IEEE80211_CCK_DEFAULT_RATES_MASK	ieee80211.h	760;"	d
IEEE80211_CCK_MODULATION	ieee80211.h	722;"	d
IEEE80211_CCK_RATES_MASK	ieee80211.h	757;"	d
IEEE80211_CCK_RATE_11MB	ieee80211.h	732;"	d
IEEE80211_CCK_RATE_11MB_MASK	ieee80211.h	747;"	d
IEEE80211_CCK_RATE_1MB	ieee80211.h	729;"	d
IEEE80211_CCK_RATE_1MB_MASK	ieee80211.h	744;"	d
IEEE80211_CCK_RATE_2MB	ieee80211.h	730;"	d
IEEE80211_CCK_RATE_2MB_MASK	ieee80211.h	745;"	d
IEEE80211_CCK_RATE_5MB	ieee80211.h	731;"	d
IEEE80211_CCK_RATE_5MB_MASK	ieee80211.h	746;"	d
IEEE80211_CCK_RATE_LEN	ieee80211.h	728;"	d
IEEE80211_CRYPT_H	ieee80211_crypt.h	24;"	d
IEEE80211_DATA_HDR3_LEN	ieee80211.h	366;"	d
IEEE80211_DATA_HDR4_LEN	ieee80211.h	367;"	d
IEEE80211_DATA_LEN	ieee80211.h	350;"	d
IEEE80211_DEBUG	ieee80211.h	469;"	d
IEEE80211_DEBUG	ieee80211.h	489;"	d
IEEE80211_DEBUG_DATA	ieee80211.h	474;"	d
IEEE80211_DEBUG_DATA	ieee80211.h	490;"	d
IEEE80211_DEBUG_DROP	ieee80211.h	555;"	d
IEEE80211_DEBUG_EAP	ieee80211.h	554;"	d
IEEE80211_DEBUG_FRAG	ieee80211.h	553;"	d
IEEE80211_DEBUG_INFO	ieee80211.h	547;"	d
IEEE80211_DEBUG_MGMT	ieee80211.h	552;"	d
IEEE80211_DEBUG_QOS	ieee80211.h	558;"	d
IEEE80211_DEBUG_RX	ieee80211.h	557;"	d
IEEE80211_DEBUG_SCAN	ieee80211.h	550;"	d
IEEE80211_DEBUG_STATE	ieee80211.h	551;"	d
IEEE80211_DEBUG_TX	ieee80211.h	556;"	d
IEEE80211_DEBUG_WX	ieee80211.h	549;"	d
IEEE80211_DEFAULT_BASIC_RATE	ieee80211.h	1376;"	d
IEEE80211_DEFAULT_RATES_MASK	ieee80211.h	774;"	d
IEEE80211_DEFAULT_TX_ESSID	ieee80211.h	1375;"	d
IEEE80211_DL_BA	ieee80211.h	537;"	d
IEEE80211_DL_DATA	ieee80211.h	543;"	d
IEEE80211_DL_DROP	ieee80211.h	531;"	d
IEEE80211_DL_EAP	ieee80211.h	530;"	d
IEEE80211_DL_ERR	ieee80211.h	544;"	d
IEEE80211_DL_FRAG	ieee80211.h	529;"	d
IEEE80211_DL_HT	ieee80211.h	536;"	d
IEEE80211_DL_INFO	ieee80211.h	524;"	d
IEEE80211_DL_IOT	ieee80211.h	541;"	d
IEEE80211_DL_MGMT	ieee80211.h	528;"	d
IEEE80211_DL_QOS	ieee80211.h	539;"	d
IEEE80211_DL_REORDER	ieee80211.h	540;"	d
IEEE80211_DL_RX	ieee80211.h	534;"	d
IEEE80211_DL_SCAN	ieee80211.h	526;"	d
IEEE80211_DL_STATE	ieee80211.h	527;"	d
IEEE80211_DL_TRACE	ieee80211.h	542;"	d
IEEE80211_DL_TS	ieee80211.h	538;"	d
IEEE80211_DL_TX	ieee80211.h	533;"	d
IEEE80211_DL_WX	ieee80211.h	525;"	d
IEEE80211_DTIM_INVALID	ieee80211.h	1386;"	d
IEEE80211_DTIM_MBCAST	ieee80211.h	1383;"	d
IEEE80211_DTIM_UCAST	ieee80211.h	1384;"	d
IEEE80211_DTIM_VALID	ieee80211.h	1385;"	d
IEEE80211_ERROR	ieee80211.h	545;"	d
IEEE80211_FC0_SUBTYPE_MASK	ieee80211.h	785;"	d
IEEE80211_FC0_SUBTYPE_QOS	ieee80211.h	786;"	d
IEEE80211_FC0_TYPE_DATA	ieee80211.h	784;"	d
IEEE80211_FC0_TYPE_MASK	ieee80211.h	783;"	d
IEEE80211_FCS_LEN	ieee80211.h	362;"	d
IEEE80211_FCTL_DSTODS	ieee80211.h	380;"	d
IEEE80211_FCTL_FRAMETYPE	ieee80211.h	377;"	d
IEEE80211_FCTL_FROMDS	ieee80211.h	379;"	d
IEEE80211_FCTL_FTYPE	ieee80211.h	375;"	d
IEEE80211_FCTL_MOREDATA	ieee80211.h	384;"	d
IEEE80211_FCTL_MOREFRAGS	ieee80211.h	381;"	d
IEEE80211_FCTL_ORDER	ieee80211.h	386;"	d
IEEE80211_FCTL_PM	ieee80211.h	383;"	d
IEEE80211_FCTL_RETRY	ieee80211.h	382;"	d
IEEE80211_FCTL_STYPE	ieee80211.h	376;"	d
IEEE80211_FCTL_TODS	ieee80211.h	378;"	d
IEEE80211_FCTL_VERS	ieee80211.h	374;"	d
IEEE80211_FCTL_WEP	ieee80211.h	385;"	d
IEEE80211_FRAG_CACHE_LEN	ieee80211.h	876;"	d
IEEE80211_FRAME_LEN	ieee80211.h	364;"	d
IEEE80211_FTYPE_CTL	ieee80211.h	389;"	d
IEEE80211_FTYPE_DATA	ieee80211.h	390;"	d
IEEE80211_FTYPE_MGMT	ieee80211.h	388;"	d
IEEE80211_H	ieee80211.h	25;"	d
IEEE80211_HLEN	ieee80211.h	363;"	d
IEEE80211_INITIALIZED	ieee80211.h	/^        IEEE80211_INITIALIZED,$/;"	e	enum:ieee80211_state
IEEE80211_LINKED	ieee80211.h	/^	IEEE80211_LINKED,$/;"	e	enum:ieee80211_state
IEEE80211_LINKED_SCANNING	ieee80211.h	/^	IEEE80211_LINKED_SCANNING,$/;"	e	enum:ieee80211_state
IEEE80211_MGMT_HDR_LEN	ieee80211.h	365;"	d
IEEE80211_NOLINK	ieee80211.h	/^	IEEE80211_NOLINK = 0,$/;"	e	enum:ieee80211_state
IEEE80211_NUM_CCK_RATES	ieee80211.h	778;"	d
IEEE80211_NUM_OFDM_RATES	ieee80211.h	777;"	d
IEEE80211_OFDM_BASIC_RATES_MASK	ieee80211.h	765;"	d
IEEE80211_OFDM_DEFAULT_RATES_MASK	ieee80211.h	768;"	d
IEEE80211_OFDM_MODULATION	ieee80211.h	723;"	d
IEEE80211_OFDM_RATES_MASK	ieee80211.h	764;"	d
IEEE80211_OFDM_RATE_12MB	ieee80211.h	736;"	d
IEEE80211_OFDM_RATE_12MB_MASK	ieee80211.h	750;"	d
IEEE80211_OFDM_RATE_18MB	ieee80211.h	737;"	d
IEEE80211_OFDM_RATE_18MB_MASK	ieee80211.h	751;"	d
IEEE80211_OFDM_RATE_24MB	ieee80211.h	738;"	d
IEEE80211_OFDM_RATE_24MB_MASK	ieee80211.h	752;"	d
IEEE80211_OFDM_RATE_36MB	ieee80211.h	739;"	d
IEEE80211_OFDM_RATE_36MB_MASK	ieee80211.h	753;"	d
IEEE80211_OFDM_RATE_48MB	ieee80211.h	740;"	d
IEEE80211_OFDM_RATE_48MB_MASK	ieee80211.h	754;"	d
IEEE80211_OFDM_RATE_54MB	ieee80211.h	741;"	d
IEEE80211_OFDM_RATE_54MB_MASK	ieee80211.h	755;"	d
IEEE80211_OFDM_RATE_6MB	ieee80211.h	734;"	d
IEEE80211_OFDM_RATE_6MB_MASK	ieee80211.h	748;"	d
IEEE80211_OFDM_RATE_9MB	ieee80211.h	735;"	d
IEEE80211_OFDM_RATE_9MB_MASK	ieee80211.h	749;"	d
IEEE80211_OFDM_RATE_LEN	ieee80211.h	733;"	d
IEEE80211_OFDM_SHIFT_MASK_A	ieee80211.h	779;"	d
IEEE80211_PRINT_STR	ieee80211.h	565;"	d
IEEE80211_PRINT_STR	ieee80211.h	583;"	d
IEEE80211_PS_DISABLED	ieee80211.h	1388;"	d
IEEE80211_PS_MBCAST	ieee80211.h	1390;"	d
IEEE80211_PS_UNICAST	ieee80211.h	1389;"	d
IEEE80211_QCTL_TID	ieee80211.h	431;"	d
IEEE80211_QOS_HAS_SEQ	ieee80211.h	788;"	d
IEEE80211_QOS_TID	ieee80211.h	1380;"	d
IEEE80211_QUEUE_LIMIT	ieee80211.h	1857;"	d
IEEE80211_SCTL_FRAG	ieee80211.h	427;"	d
IEEE80211_SCTL_SEQ	ieee80211.h	428;"	d
IEEE80211_SHUTDOWN	ieee80211.h	/^        IEEE80211_SHUTDOWN$/;"	e	enum:ieee80211_state
IEEE80211_SOFTMAC_ASSOC_RETRY_TIME	ieee80211.h	1183;"	d
IEEE80211_SOFTMAC_SCAN_TIME	ieee80211.h	1181;"	d
IEEE80211_STATMASK_NOISE	ieee80211.h	718;"	d
IEEE80211_STATMASK_RATE	ieee80211.h	719;"	d
IEEE80211_STATMASK_RSSI	ieee80211.h	717;"	d
IEEE80211_STATMASK_SIGNAL	ieee80211.h	716;"	d
IEEE80211_STATMASK_WEMASK	ieee80211.h	720;"	d
IEEE80211_STYPE_ACK	ieee80211.h	410;"	d
IEEE80211_STYPE_ASSOC_REQ	ieee80211.h	393;"	d
IEEE80211_STYPE_ASSOC_RESP	ieee80211.h	394;"	d
IEEE80211_STYPE_ATIM	ieee80211.h	400;"	d
IEEE80211_STYPE_AUTH	ieee80211.h	402;"	d
IEEE80211_STYPE_BEACON	ieee80211.h	399;"	d
IEEE80211_STYPE_BLOCKACK	ieee80211.h	413;"	d
IEEE80211_STYPE_CFACK	ieee80211.h	421;"	d
IEEE80211_STYPE_CFACKPOLL	ieee80211.h	423;"	d
IEEE80211_STYPE_CFEND	ieee80211.h	411;"	d
IEEE80211_STYPE_CFENDACK	ieee80211.h	412;"	d
IEEE80211_STYPE_CFPOLL	ieee80211.h	422;"	d
IEEE80211_STYPE_CTS	ieee80211.h	409;"	d
IEEE80211_STYPE_DATA	ieee80211.h	416;"	d
IEEE80211_STYPE_DATA_CFACK	ieee80211.h	417;"	d
IEEE80211_STYPE_DATA_CFACKPOLL	ieee80211.h	419;"	d
IEEE80211_STYPE_DATA_CFPOLL	ieee80211.h	418;"	d
IEEE80211_STYPE_DEAUTH	ieee80211.h	403;"	d
IEEE80211_STYPE_DISASSOC	ieee80211.h	401;"	d
IEEE80211_STYPE_MANAGE_ACT	ieee80211.h	404;"	d
IEEE80211_STYPE_NULLFUNC	ieee80211.h	420;"	d
IEEE80211_STYPE_PROBE_REQ	ieee80211.h	397;"	d
IEEE80211_STYPE_PROBE_RESP	ieee80211.h	398;"	d
IEEE80211_STYPE_PSPOLL	ieee80211.h	407;"	d
IEEE80211_STYPE_QOS_DATA	ieee80211.h	424;"	d
IEEE80211_STYPE_QOS_NULL	ieee80211.h	425;"	d
IEEE80211_STYPE_REASSOC_REQ	ieee80211.h	395;"	d
IEEE80211_STYPE_REASSOC_RESP	ieee80211.h	396;"	d
IEEE80211_STYPE_RTS	ieee80211.h	408;"	d
IEEE80211_UNINITIALIZED	ieee80211.h	/^        IEEE80211_UNINITIALIZED = 0,$/;"	e	enum:ieee80211_state
IEEE80211_WARNING	ieee80211.h	546;"	d
IEEE80211_WATCH_DOG_TIME	r8192U.h	216;"	d
IEEE_A	ieee80211.h	2064;"	d
IEEE_B	ieee80211.h	2065;"	d
IEEE_CMD_MLME	ieee80211.h	224;"	d
IEEE_CMD_SET_ENCRYPTION	ieee80211.h	223;"	d
IEEE_CMD_SET_WPA_IE	ieee80211.h	222;"	d
IEEE_CMD_SET_WPA_PARAM	ieee80211.h	221;"	d
IEEE_CRYPT_ALG_NAME_LEN	ieee80211.h	263;"	d
IEEE_CRYPT_ERR_CARD_CONF_FAILED	ieee80211.h	260;"	d
IEEE_CRYPT_ERR_CRYPT_INIT_FAILED	ieee80211.h	257;"	d
IEEE_CRYPT_ERR_KEY_SET_FAILED	ieee80211.h	258;"	d
IEEE_CRYPT_ERR_TX_KEY_SET_FAILED	ieee80211.h	259;"	d
IEEE_CRYPT_ERR_UNKNOWN_ADDR	ieee80211.h	256;"	d
IEEE_CRYPT_ERR_UNKNOWN_ALG	ieee80211.h	255;"	d
IEEE_G	ieee80211.h	2066;"	d
IEEE_IBSS_MAC_HASH_SIZE	ieee80211.h	793;"	d
IEEE_KEY_MGMT_IEEE8021X	ieee80211.h	248;"	d
IEEE_KEY_MGMT_PSK	ieee80211.h	249;"	d
IEEE_MLME_STA_DEAUTH	ieee80211.h	251;"	d
IEEE_MLME_STA_DISASSOC	ieee80211.h	252;"	d
IEEE_MODE_MASK	ieee80211.h	2069;"	d
IEEE_N_24G	ieee80211.h	2067;"	d
IEEE_N_5G	ieee80211.h	2068;"	d
IEEE_PARAM_AUTH_ALGS	ieee80211.h	230;"	d
IEEE_PARAM_DROP_UNENCRYPTED	ieee80211.h	228;"	d
IEEE_PARAM_IEEE_802_1X	ieee80211.h	231;"	d
IEEE_PARAM_PRIVACY_INVOKED	ieee80211.h	229;"	d
IEEE_PARAM_TKIP_COUNTERMEASURES	ieee80211.h	227;"	d
IEEE_PARAM_WPAX_SELECT	ieee80211.h	234;"	d
IEEE_PARAM_WPA_ENABLED	ieee80211.h	226;"	d
IEEE_PROTO_RSN	ieee80211.h	238;"	d
IEEE_PROTO_WPA	ieee80211.h	237;"	d
IEEE_SOFTMAC_ASSOCIATE	ieee80211.h	2079;"	d
IEEE_SOFTMAC_BEACONS	ieee80211.h	2100;"	d
IEEE_SOFTMAC_PROBERQ	ieee80211.h	2082;"	d
IEEE_SOFTMAC_PROBERS	ieee80211.h	2085;"	d
IEEE_SOFTMAC_SCAN	ieee80211.h	2076;"	d
IEEE_SOFTMAC_SINGLE_QUEUE	ieee80211.h	2095;"	d
IEEE_SOFTMAC_TX_QUEUE	ieee80211.h	2090;"	d
IEEE_WPAX_CCMP	ieee80211.h	245;"	d
IEEE_WPAX_TKIP	ieee80211.h	243;"	d
IEEE_WPAX_USEGROUP	ieee80211.h	241;"	d
IEEE_WPAX_WEP104	ieee80211.h	246;"	d
IEEE_WPAX_WEP40	ieee80211.h	242;"	d
IEEE_WPAX_WRAP	ieee80211.h	244;"	d
IE_dismatch	ieee80211.h	/^	IE_dismatch 	= 0x11,$/;"	e	enum:_ReasonCode
INCLUDE	Makefile	/^INCLUDE := -isystem \/lib\/modules\/`uname -r`\/build\/include$/;"	m
INSTALL_PREFIX	Makefile	/^INSTALL_PREFIX :=$/;"	m
IOTAction	r819xU_HTType.h	/^	u32					IOTAction;$/;"	m	struct:_RT_HIGH_THROUGHPUT
ISR_BcnTimerIntr	r819xU_cmdpkt.h	14;"	d
ISR_TxBcnErr	r819xU_cmdpkt.h	13;"	d
ISR_TxBcnOk	r819xU_cmdpkt.h	12;"	d
IW_QUAL_LEVEL_INVALID	ieee80211.h	313;"	d
IW_QUAL_LEVEL_UPDATED	ieee80211.h	316;"	d
IW_QUAL_NOISE_INVALID	ieee80211.h	314;"	d
IW_QUAL_NOISE_UPDATED	ieee80211.h	317;"	d
IW_QUAL_QUAL_INVALID	ieee80211.h	312;"	d
IW_QUAL_QUAL_UPDATED	ieee80211.h	315;"	d
Initial_Tx_Rate_Reg	r8192U_dm.h	58;"	d
InitializeExtraRegsOn8185	r8180_rtl8225z2.c	/^InitializeExtraRegsOn8185(struct net_device	*dev)$/;"	f
IsDataFrame	ieee80211.h	434;"	d
IsLegacyDataFrame	ieee80211.h	435;"	d
IsQoSDataFrame	ieee80211.h	437;"	d
KEY_BUF_SIZE	r8192U.h	51;"	d
KEY_TYPE_CCMP	ieee80211.h	56;"	d
KEY_TYPE_NA	ieee80211.h	53;"	d
KEY_TYPE_TKIP	ieee80211.h	55;"	d
KEY_TYPE_WEP104	ieee80211.h	57;"	d
KEY_TYPE_WEP40	ieee80211.h	54;"	d
KSRC	Makefile	/^KSRC := \/lib\/modules\/$(KVER)\/build$/;"	m
KVER	Makefile	/^KVER  := $(shell uname -r)$/;"	m
LED0Cfg	r8192U_hw.h	/^ 	LED0Cfg			=		0x155,\/\/ LED0 Configuration Register$/;"	e	enum:_RTL8192Usb_HW
LED1Cfg	r8192U_hw.h	/^	LED1Cfg			=		0x154,\/\/ LED1 Configuration Register$/;"	e	enum:_RTL8192Usb_HW
LED_STRATEGY_8190	r8192U.h	/^}LED_STRATEGY_8190, *PLED_STRATEGY_8190;$/;"	t	typeref:enum:_LED_STRATEGY_8190
LINIP	r8192U.h	/^	u8	LINIP:1;$/;"	m	struct:_tx_desc_cmd_819x_usb
LINIP	r8192U.h	/^        u8	LINIP:1;$/;"	m	struct:_tx_desc_819x_usb
LOOP_TEST	r8192U_core.c	39;"	d	file:
LOW_PRIORITY	r8192U.h	/^	LOW_PRIORITY,$/;"	e	enum:__anon15
LOW_QUEUE	ieee80211.h	75;"	d
LSigTxopProtect	r819xU_HTType.h	/^	u8	LSigTxopProtect:1;$/;"	m	struct:_HT_CAPABILITY_ELE
LSigTxopProtectFull	r819xU_HTType.h	/^	u8	LSigTxopProtectFull:1;$/;"	m	struct:_HT_INFORMATION_ELE
LastRxDescTSFHigh	r8192U.h	/^	u32     LastRxDescTSFHigh;$/;"	m	struct:r8192_priv
LastRxDescTSFLow	r8192U.h	/^	u32     LastRxDescTSFLow;$/;"	m	struct:r8192_priv
LastSeg	r8192U.h	/^	u8	LastSeg:1;$/;"	m	struct:_tx_desc_cmd_819x_usb
LastSeg	r8192U.h	/^        u8	LastSeg:1;$/;"	m	struct:_tx_desc_819x_usb
LedStrategy	r8192U.h	/^	LED_STRATEGY_8190	LedStrategy;  $/;"	m	struct:r8192_priv
LeftAntenna	r819xU_phyreg.h	830;"	d
Length	ieee80211.h	/^	u16       Length;$/;"	m	struct:ieee80211_rx_stats
Length	r8192U.h	/^	u16			Length:14;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
Length	r8192U.h	/^	u16                 Length:14;$/;"	m	struct:rx_desc_819x_usb
Length	r8192U_dm.h	/^	u32	Length;									\/* Command packet length. *\/$/;"	m	struct:tag_Tx_Config_Cmd_Format
List	ieee80211.h	/^	struct list_head	List;$/;"	m	struct:_RX_REORDER_ENTRY	typeref:struct:_RX_REORDER_ENTRY::list_head
LongRetryLimit	r8192U.h	/^	u16	LongRetryLimit;$/;"	m	struct:r8192_priv
LoopbackMode	r8192U.h	/^	rtl819xUsb_loopback_e	LoopbackMode;$/;"	m	struct:r8192_priv
MAC0	r8192U_hw.h	/^	MAC0 			= 0x000,$/;"	e	enum:_RTL8192Usb_HW
MAC1	r8192U_hw.h	/^	MAC1 			= 0x001,$/;"	e	enum:_RTL8192Usb_HW
MAC2	r8192U_hw.h	/^	MAC2 			= 0x002,$/;"	e	enum:_RTL8192Usb_HW
MAC3	r8192U_hw.h	/^	MAC3 			= 0x003,$/;"	e	enum:_RTL8192Usb_HW
MAC4	r8192U_hw.h	/^	MAC4 			= 0x004,$/;"	e	enum:_RTL8192Usb_HW
MAC5	r8192U_hw.h	/^	MAC5 			= 0x005,$/;"	e	enum:_RTL8192Usb_HW
MACPHY_ArrayLength	r819xU_phy.h	12;"	d
MACPHY_Array_PGLength	r819xU_phy.h	9;"	d
MAC_ADR	r8180_93cx6.h	31;"	d
MAC_ARG	ieee80211.h	496;"	d
MAC_FILTER_MASK	r8192U_hw.h	140;"	d
MAC_FMT	ieee80211.h	495;"	d
MAC_REG_TABLE	r8180_rtl8225z2.c	/^static u32 MAC_REG_TABLE[][3]={ $/;"	v	file:
MANAGE_PRIORITY	r8192U.h	/^	MANAGE_PRIORITY,$/;"	e	enum:__anon15
MAR0	r8192U_hw.h	/^	MAR0			= 0x240, \/\/ Multicast filter. $/;"	e	enum:_RTL8192Usb_HW
MAR4	r8192U_hw.h	/^	MAR4			= 0x244,$/;"	e	enum:_RTL8192Usb_HW
MAX_802_11_HEADER_LENGTH	r8192U.h	427;"	d
MAX_8192U_RX_SIZE	r8192U.h	618;"	d
MAX_CHANNEL_NUMBER	ieee80211.h	1180;"	d
MAX_DEV_ADDR_SIZE	ieee80211.h	441;"	d
MAX_DEV_ADDR_SIZE	r8192U.h	425;"	d
MAX_FIRMWARE_INFORMATION_SIZE	r8192U.h	426;"	d
MAX_FRAGMENT_COUNT	r8192U.h	431;"	d
MAX_FRAG_THRESHOLD	ieee80211.h	370;"	d
MAX_IE_LEN	ieee80211.h	265;"	d
MAX_KEY_LEN	r8192U.h	50;"	d
MAX_NETWORK_COUNT	ieee80211.h	1178;"	d
MAX_POSTCMD_CNT	r819xU_phy.h	7;"	d
MAX_PRECMD_CNT	r819xU_phy.h	5;"	d
MAX_QUEUE_SIZE	ieee80211.h	60;"	d
MAX_RATES_EX_LENGTH	ieee80211.h	1177;"	d
MAX_RATES_LENGTH	ieee80211.h	1176;"	d
MAX_RECEIVE_BUFFER_SIZE	ieee80211.h	1406;"	d
MAX_RECEIVE_BUFFER_SIZE	ieee80211.h	2374;"	d
MAX_RECEIVE_BUFFER_SIZE	r8192U.h	478;"	d
MAX_RFDEPENDCMD_CNT	r819xU_phy.h	6;"	d
MAX_RX_DMA_MASK	r8192U_hw.h	149;"	d
MAX_RX_URB	r8192U_hw.h	57;"	d
MAX_SP_Len	ieee80211.h	1379;"	d
MAX_STR_LEN	ieee80211.h	562;"	d
MAX_SUBFRAME_COUNT	ieee80211.h	1149;"	d
MAX_SWEEP_TAB_ENTRIES	ieee80211.h	1170;"	d
MAX_SWEEP_TAB_ENTRIES_PER_PACKET	ieee80211.h	1171;"	d
MAX_TRANSMIT_BUFFER_SIZE	r8192U.h	432;"	d
MAX_TX_AGG_COUNT	ieee80211.h	1143;"	d
MAX_TX_URB	r8192U_hw.h	56;"	d
MAX_WPA_IE_LEN	ieee80211.h	1187;"	d
MCS	r819xU_HTType.h	/^	u8	MCS[16];$/;"	m	struct:_HT_CAPABILITY_ELE
MCSTxPowerLevelOriginalOffset	r8192U.h	/^	u32	MCSTxPowerLevelOriginalOffset[6];$/;"	m	struct:r8192_priv
MCS_TXAGC	r8192U_hw.h	/^	MCS_TXAGC		= 0x340, \/\/ MCS AGC$/;"	e	enum:_RTL8192Usb_HW
MCTRL	r8192U_hw.h	/^	MCTRL			= 0x25A, \/\/ Measurement Control$/;"	e	enum:_RTL8192Usb_HW
MFIE_TYPE_CF_SET	ieee80211.h	/^        MFIE_TYPE_CF_SET = 4,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_CHALLENGE	ieee80211.h	/^        MFIE_TYPE_CHALLENGE = 16,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_COUNTRY	ieee80211.h	/^        MFIE_TYPE_COUNTRY = 7,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_CSA	ieee80211.h	/^        MFIE_TYPE_CSA = 37,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_DS_SET	ieee80211.h	/^        MFIE_TYPE_DS_SET = 3,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_ERP	ieee80211.h	/^        MFIE_TYPE_ERP = 42,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_FH_SET	ieee80211.h	/^        MFIE_TYPE_FH_SET = 2,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_GENERIC	ieee80211.h	/^        MFIE_TYPE_GENERIC = 221,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_HOP_PARAMS	ieee80211.h	/^        MFIE_TYPE_HOP_PARAMS = 8,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_HOP_TABLE	ieee80211.h	/^        MFIE_TYPE_HOP_TABLE = 9,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_HT_CAP	ieee80211.h	/^        MFIE_TYPE_HT_CAP= 45,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_HT_INFO	ieee80211.h	/^	 MFIE_TYPE_HT_INFO= 61,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_IBSS_DFS	ieee80211.h	/^        MFIE_TYPE_IBSS_DFS = 41,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_IBSS_SET	ieee80211.h	/^        MFIE_TYPE_IBSS_SET = 6,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_MEASURE_REPORT	ieee80211.h	/^        MFIE_TYPE_MEASURE_REPORT = 39,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_MEASURE_REQUEST	ieee80211.h	/^        MFIE_TYPE_MEASURE_REQUEST = 38,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_POWER_CAPABILITY	ieee80211.h	/^        MFIE_TYPE_POWER_CAPABILITY = 33,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_POWER_CONSTRAINT	ieee80211.h	/^        MFIE_TYPE_POWER_CONSTRAINT = 32,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_QOS_PARAMETER	ieee80211.h	/^        MFIE_TYPE_QOS_PARAMETER = 222,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_QUIET	ieee80211.h	/^        MFIE_TYPE_QUIET = 40,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_RATES	ieee80211.h	/^        MFIE_TYPE_RATES = 1,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_RATES_EX	ieee80211.h	/^        MFIE_TYPE_RATES_EX = 50,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_REQUEST	ieee80211.h	/^        MFIE_TYPE_REQUEST = 10,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_RSN	ieee80211.h	/^        MFIE_TYPE_RSN = 48,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_SSID	ieee80211.h	/^        MFIE_TYPE_SSID = 0,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_SUPP_CHANNELS	ieee80211.h	/^        MFIE_TYPE_SUPP_CHANNELS = 36,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_TIM	ieee80211.h	/^        MFIE_TYPE_TIM = 5,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_TPC_REPORT	ieee80211.h	/^        MFIE_TYPE_TPC_REPORT = 35,$/;"	e	enum:ieee80211_mfie
MFIE_TYPE_TPC_REQUEST	ieee80211.h	/^        MFIE_TYPE_TPC_REQUEST = 34,$/;"	e	enum:ieee80211_mfie
MGMT_QUEUE_NUM	ieee80211.h	219;"	d
MGNT_QUEUE	ieee80211.h	71;"	d
MGN_11M	ieee80211.h	141;"	d
MGN_12M	ieee80211.h	145;"	d
MGN_18M	ieee80211.h	146;"	d
MGN_1M	ieee80211.h	138;"	d
MGN_24M	ieee80211.h	147;"	d
MGN_2M	ieee80211.h	139;"	d
MGN_36M	ieee80211.h	148;"	d
MGN_48M	ieee80211.h	149;"	d
MGN_54M	ieee80211.h	150;"	d
MGN_5_5M	ieee80211.h	140;"	d
MGN_6M	ieee80211.h	143;"	d
MGN_9M	ieee80211.h	144;"	d
MGN_MCS0	ieee80211.h	152;"	d
MGN_MCS1	ieee80211.h	153;"	d
MGN_MCS10	ieee80211.h	162;"	d
MGN_MCS11	ieee80211.h	163;"	d
MGN_MCS12	ieee80211.h	164;"	d
MGN_MCS13	ieee80211.h	165;"	d
MGN_MCS14	ieee80211.h	166;"	d
MGN_MCS15	ieee80211.h	167;"	d
MGN_MCS2	ieee80211.h	154;"	d
MGN_MCS3	ieee80211.h	155;"	d
MGN_MCS4	ieee80211.h	156;"	d
MGN_MCS5	ieee80211.h	157;"	d
MGN_MCS6	ieee80211.h	158;"	d
MGN_MCS7	ieee80211.h	159;"	d
MGN_MCS8	ieee80211.h	160;"	d
MGN_MCS9	ieee80211.h	161;"	d
MIMOPS_CTRL	r819xU_HTType.h	/^} MIMOPS_CTRL, *PMIMOPS_CTRL;$/;"	t	typeref:struct:_MIMOPS_CTRL
MIMO_EVM	r819xU_HTType.h	/^}MIMO_EVM, *PMIMO_EVM;$/;"	t	typeref:struct:_MIMO_EVM
MIMO_PS_DYNAMIC	r819xU_HTType.h	22;"	d
MIMO_PS_NOLIMIT	r819xU_HTType.h	23;"	d
MIMO_PS_STATIC	r819xU_HTType.h	21;"	d
MIMO_RSSI	r819xU_HTType.h	/^}MIMO_RSSI, *PMIMO_RSSI;$/;"	t	typeref:struct:_MIMO_RSSI
MINIPCI	r8192U.h	/^	enum card_type {PCI,MINIPCI,CARDBUS,USB\/*rtl8187*\/}card_type;$/;"	e	enum:r8192_priv::card_type
MIN_FRAG_THRESHOLD	ieee80211.h	369;"	d
MIN_FRAG_THRESHOLD	r8192U.h	514;"	d
MODDESTDIR	Makefile	/^MODDESTDIR := \/lib\/modules\/$(KVER)\/kernel\/drivers\/net\/wireless$/;"	m
MOREFRAG	r8192U.h	/^	u8	MOREFRAG:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
MOREFRAG	r8192U.h	/^        u8	MOREFRAG:1;$/;"	m	struct:_tx_desc_819x_usb
MPDUDensity	r819xU_HTType.h	/^	u8	MPDUDensity:3;$/;"	m	struct:_HT_CAPABILITY_ELE
MPDU_Density	r819xU_HTType.h	/^	u8				MPDU_Density;				\/\/ This indicate Tx A-MPDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
MPDU_Density	r819xU_HTType.h	/^	u8			MPDU_Density;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
MQDA	r8192U_hw.h	/^	MQDA			= 0x20C, \/\/ Management Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
MRateToHwRate8190Pci	r8192U_core.c	/^u8 MRateToHwRate8190Pci(u8 rate)$/;"	f
MSECS	ieee80211.h	334;"	d
MSECS	ieee80211.h	346;"	d
MSR	r8192U_hw.h	/^	MSR			= 0x303, \/\/ Media Status register$/;"	e	enum:_RTL8192Usb_HW
MSR_LINK_ADHOC	r8192U_hw.h	302;"	d
MSR_LINK_ENEDCA	r8192U_hw.h	304;"	d
MSR_LINK_MANAGED	r8192U_hw.h	299;"	d
MSR_LINK_MASK	r8192U_hw.h	298;"	d
MSR_LINK_MASTER	r8192U_hw.h	303;"	d
MSR_LINK_NONE	r8192U_hw.h	300;"	d
MSR_LINK_SHIFT	r8192U_hw.h	301;"	d
MacBlkCtrl	r8192U_hw.h	/^	MacBlkCtrl		= 0x403, \/\/ Mac block on\/off control register$/;"	e	enum:_RTL8192Usb_HW
MacConfig_87BASIC	r8180_rtl8225z2.c	/^static void MacConfig_87BASIC(struct net_device *dev)$/;"	f	file:
MacConfig_87BASIC_HardCode	r8180_rtl8225z2.c	/^MacConfig_87BASIC_HardCode(struct net_device *dev)$/;"	f
MapHwQueueToFirmwareQueue	r8192U_core.c	/^u8 MapHwQueueToFirmwareQueue(u8 QueueID)$/;"	f
MaxAMSDUSize	r819xU_HTType.h	/^	u8	MaxAMSDUSize:1;$/;"	m	struct:_HT_CAPABILITY_ELE
MaxRxAMPDUFactor	r819xU_HTType.h	/^	u8	MaxRxAMPDUFactor:2;$/;"	m	struct:_HT_CAPABILITY_ELE
Mcast	r8192U.h	/^	u8                  Mcast:1;$/;"	m	struct:rx_drvinfo_819x_usb
McsRateSet	r819xU_HTType.h	/^	u8			McsRateSet[16];$/;"	m	struct:_RT_HTINFO_STA_ENTRY
MimoPs	r819xU_HTType.h	/^	u8			MimoPs;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
MimoPsEnable	r819xU_HTType.h	/^	u8	MimoPsEnable:1;$/;"	m	struct:_MIMOPS_CTRL
MimoPsMode	r819xU_HTType.h	/^	u8	MimoPsMode:1;$/;"	m	struct:_MIMOPS_CTRL
MimoPwrSave	r819xU_HTType.h	/^	u8	MimoPwrSave:2;$/;"	m	struct:_HT_CAPABILITY_ELE
NETWORK_EMPTY_ESSID	ieee80211.h	1189;"	d
NETWORK_HAS_CCK	ieee80211.h	1191;"	d
NETWORK_HAS_CSA	ieee80211.h	1200;"	d
NETWORK_HAS_ERP_VALUE	ieee80211.h	1205;"	d
NETWORK_HAS_IBSS_DFS	ieee80211.h	1202;"	d
NETWORK_HAS_OFDM	ieee80211.h	1190;"	d
NETWORK_HAS_POWER_CONSTRAINT	ieee80211.h	1199;"	d
NETWORK_HAS_QOS_INFORMATION	ieee80211.h	1195;"	d
NETWORK_HAS_QOS_MASK	ieee80211.h	1196;"	d
NETWORK_HAS_QOS_PARAMETERS	ieee80211.h	1194;"	d
NETWORK_HAS_QUIET	ieee80211.h	1201;"	d
NETWORK_HAS_TPC_REPORT	ieee80211.h	1203;"	d
NHM_PERIOD	r8192U_hw.h	/^	NHM_PERIOD		= 0x252, \/\/ NHM Measurement Period register, in unit of TU.$/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER0	r8192U_hw.h	/^	NHM_RPI_COUNTER0	= 0x264, \/\/ Noise Histogram RPI counter0, the fraction of signal strength < NHM_THRESHOLD0. $/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER1	r8192U_hw.h	/^	NHM_RPI_COUNTER1	= 0x265, \/\/ Noise Histogram RPI counter1, the fraction of signal strength in (NHM_THRESHOLD0, NHM_THRESHOLD1]. $/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER2	r8192U_hw.h	/^	NHM_RPI_COUNTER2	= 0x266, \/\/ Noise Histogram RPI counter2, the fraction of signal strength in (NHM_THRESHOLD1, NHM_THRESHOLD2].$/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER3	r8192U_hw.h	/^	NHM_RPI_COUNTER3	= 0x267, \/\/ Noise Histogram RPI counter3, the fraction of signal strength in (NHM_THRESHOLD2, NHM_THRESHOLD3].$/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER4	r8192U_hw.h	/^	NHM_RPI_COUNTER4	= 0x268, \/\/ Noise Histogram RPI counter4, the fraction of signal strength in (NHM_THRESHOLD3, NHM_THRESHOLD4].$/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER5	r8192U_hw.h	/^	NHM_RPI_COUNTER5	= 0x269, \/\/ Noise Histogram RPI counter5, the fraction of signal strength in (NHM_THRESHOLD4, NHM_THRESHOLD5].$/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER6	r8192U_hw.h	/^	NHM_RPI_COUNTER6	= 0x26A, \/\/ Noise Histogram RPI counter6, the fraction of signal strength in (NHM_THRESHOLD5, NHM_THRESHOLD6]. $/;"	e	enum:_RTL8192Usb_HW
NHM_RPI_COUNTER7	r8192U_hw.h	/^	NHM_RPI_COUNTER7	= 0x26B, \/\/ Noise Histogram RPI counter7, the fraction of signal strength in (NHM_THRESHOLD6, NHM_THRESHOLD7].$/;"	e	enum:_RTL8192Usb_HW
NHM_THRESHOLD0	r8192U_hw.h	/^	NHM_THRESHOLD0		= 0x253, \/\/ Noise Histogram Meashorement0.$/;"	e	enum:_RTL8192Usb_HW
NHM_THRESHOLD1	r8192U_hw.h	/^	NHM_THRESHOLD1		= 0x254, \/\/ Noise Histogram Meashorement1.$/;"	e	enum:_RTL8192Usb_HW
NHM_THRESHOLD2	r8192U_hw.h	/^	NHM_THRESHOLD2		= 0x255, \/\/ Noise Histogram Meashorement2.$/;"	e	enum:_RTL8192Usb_HW
NHM_THRESHOLD3	r8192U_hw.h	/^	NHM_THRESHOLD3		= 0x256, \/\/ Noise Histogram Meashorement3.$/;"	e	enum:_RTL8192Usb_HW
NHM_THRESHOLD4	r8192U_hw.h	/^	NHM_THRESHOLD4		= 0x257, \/\/ Noise Histogram Meashorement4.$/;"	e	enum:_RTL8192Usb_HW
NHM_THRESHOLD5	r8192U_hw.h	/^	NHM_THRESHOLD5		= 0x258, \/\/ Noise Histogram Meashorement5.$/;"	e	enum:_RTL8192Usb_HW
NHM_THRESHOLD6	r8192U_hw.h	/^	NHM_THRESHOLD6		= 0x259, \/\/ Noise Histogram Meashorement6$/;"	e	enum:_RTL8192Usb_HW
NIC_8192U	r8192U.h	/^	NIC_8192U = 1,$/;"	e	enum:__anon16
NON_SHORT_SLOT_TIME	r8192U_core.c	2154;"	d	file:
NORMAL_QUEUE	ieee80211.h	76;"	d
NORM_PRIORITY	r8192U.h	/^	NORM_PRIORITY, $/;"	e	enum:__anon15
NUM_OF_FIRMWARE_QUEUE	r8192U.h	485;"	d
NUM_OF_PAGES_IN_FW	r8192U.h	486;"	d
NUM_OF_PAGE_IN_FW_QUEUE_BCN	r8192U.h	495;"	d
NUM_OF_PAGE_IN_FW_QUEUE_BE	r8192U.h	487;"	d
NUM_OF_PAGE_IN_FW_QUEUE_BK	r8192U.h	488;"	d
NUM_OF_PAGE_IN_FW_QUEUE_CMD	r8192U.h	492;"	d
NUM_OF_PAGE_IN_FW_QUEUE_HCCA	r8192U.h	491;"	d
NUM_OF_PAGE_IN_FW_QUEUE_HIGH	r8192U.h	494;"	d
NUM_OF_PAGE_IN_FW_QUEUE_MGNT	r8192U.h	493;"	d
NUM_OF_PAGE_IN_FW_QUEUE_PUB	r8192U.h	496;"	d
NUM_OF_PAGE_IN_FW_QUEUE_VI	r8192U.h	489;"	d
NUM_OF_PAGE_IN_FW_QUEUE_VO	r8192U.h	490;"	d
N_DBPSOfRate	r8192U_core.c	/^u16 N_DBPSOfRate(u16 DataRate)$/;"	f
NoACM	r8192U.h	/^	u8	NoACM:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
NoACM	r8192U.h	/^        u8	NoACM:1;$/;"	m	struct:_tx_desc_819x_usb
NoEnc	r8192U.h	/^	u8	NoEnc:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
NoEnc	r8192U.h	/^        u8	NoEnc:1;$/;"	m	struct:_tx_desc_819x_usb
NonGFDevPresent	r819xU_HTType.h	/^	u8	NonGFDevPresent:1;$/;"	m	struct:_HT_INFORMATION_ELE
NumTotalRFPath	r8192U.h	/^	u8 					NumTotalRFPath;	$/;"	m	struct:r8192_priv
OBJS	Makefile	/^OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}$/;"	m
OFDM_CONFIG	r8180_rtl8225z2.c	/^static u8 OFDM_CONFIG[]={$/;"	v	file:
OPT_FIRMWARE_RESET	r819xU_firmware.h	/^	OPT_FIRMWARE_RESET = 1,$/;"	e	enum:_opt_rst_type
OPT_SYSTEM_RESET	r819xU_firmware.h	/^	OPT_SYSTEM_RESET = 0,$/;"	e	enum:_opt_rst_type
OWN	r8192U.h	/^	u8	OWN:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
OWN	r8192U.h	/^	u8	OWN:1;$/;"	m	struct:_tx_desc_cmd_819x_usb
OWN	r8192U.h	/^        u8	OWN:1;$/;"	m	struct:_tx_desc_819x_usb
Offset	r8192U.h	/^	u8			Offset;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
Offset	r8192U.h	/^	u8	Offset;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
Offset	r8192U.h	/^        u8	Offset;$/;"	m	struct:_tx_desc_819x_usb
Op	r8192U_dm.h	/^	u32	Op;										\/* Command packet type. *\/																			$/;"	m	struct:tag_Tx_Config_Cmd_Format
OptMode	r819xU_HTType.h	/^	u8	OptMode:2;$/;"	m	struct:_HT_INFORMATION_ELE
P80211_OUI_LEN	ieee80211.h	607;"	d
PACT_CATEGORY	ieee80211.h	/^} ACT_CATEGORY, *PACT_CATEGORY;$/;"	t	typeref:enum:_ACT_CATEGORY
PAM	r8192U.h	/^	u8                  PAM:1;$/;"	m	struct:rx_drvinfo_819x_usb
PBA_ACTION	ieee80211.h	/^} BA_ACTION, *PBA_ACTION;$/;"	t	typeref:enum:_BA_ACTION
PBB_REGISTER_DEFINITION_T	r8192U.h	/^}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;$/;"	t	typeref:struct:_BB_REGISTER_DEFINITION
PBSS_HT	r819xU_HTType.h	/^}BSS_HT, *PBSS_HT;$/;"	t	typeref:struct:_BSS_HT
PBaseBand_Config_Type	r8192U_hw.h	/^}BaseBand_Config_Type, *PBaseBand_Config_Type;$/;"	t	typeref:enum:_BaseBand_Config_Type
PCHANNEL_ACCESS_SETTING	r8192U.h	/^}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;$/;"	t	typeref:struct:ChnlAccessSetting
PCHNLOP	r819xU_HTType.h	/^} CHNLOP, *PCHNLOP;$/;"	t	typeref:enum:_CHNLOP
PCI	r8192U.h	/^	enum card_type {PCI,MINIPCI,CARDBUS,USB\/*rtl8187*\/}card_type;$/;"	e	enum:r8192_priv::card_type
PCIF	r8192U_hw.h	/^	PCIF			= 0x009, \/\/ PCI Function Register 0x0009h~0x000bh$/;"	e	enum:_RTL8192Usb_HW
PDCMD_TXCMD_T	r8192U_dm.h	/^}DCMD_TXCMD_T, *PDCMD_TXCMD_T;$/;"	t	typeref:struct:tag_Tx_Config_Cmd_Format
PFALSE_ALARM_STATISTICS	r819xU_HTType.h	/^}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;$/;"	t	typeref:struct:_FALSE_ALARM_STATISTICS
PHT_ACTION	r819xU_HTType.h	/^} HT_ACTION, *PHT_ACTION;$/;"	t	typeref:enum:_HT_ACTION
PHT_AGGRE_MODE_E	r819xU_HTType.h	/^}HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E;$/;"	t	typeref:enum:_HT_AGGRE_MODE_E
PHT_CAPABILITY_ELE	r819xU_HTType.h	/^}__attribute__((packed)) HT_CAPABILITY_ELE, *PHT_CAPABILITY_ELE;$/;"	t	typeref:struct:_HT_CAPABILITY_ELE
PHT_CHANNEL_WIDTH	r819xU_HTType.h	/^}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;$/;"	t	typeref:enum:_HT_CHANNEL_WIDTH
PHT_EXTCHNL_OFFSET	r819xU_HTType.h	/^}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET;$/;"	t	typeref:enum:_HT_EXTCHNL_OFFSET
PHT_INFORMATION_ELE	r819xU_HTType.h	/^}__attribute__((packed)) HT_INFORMATION_ELE, *PHT_INFORMATION_ELE;$/;"	t	typeref:struct:_HT_INFORMATION_ELE
PHT_IOT_ACTION_E	r819xU_HTGen.h	/^}HT_IOT_ACTION_E, *PHT_IOT_ACTION_E;$/;"	t	typeref:enum:_HT_IOT_ACTION
PHT_MCS_RATE	r819xU_HTType.h	/^}HT_MCS_RATE,*PHT_MCS_RATE;$/;"	t	typeref:enum:_HT_MCS_RATE
PHT_SPEC_VER	r819xU_HTType.h	/^}HT_SPEC_VER, *PHT_SPEC_VER;$/;"	t	typeref:enum:_HT_SPEC_VER
PHW90_BLOCK_E	r819xU_phy.h	/^}HW90_BLOCK_E, *PHW90_BLOCK_E;$/;"	t	typeref:enum:_HW90_BLOCK
PHYRegDef	r8192U.h	/^	BB_REGISTER_DEFINITION_T	PHYRegDef[4];	\/\/Radio A\/B\/C\/D$/;"	m	struct:r8192_priv
PHYStatus	r8192U.h	/^	u8			PHYStatus:1;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
PHYStatus	r8192U.h	/^	u8                  PHYStatus:1;$/;"	m	struct:rx_desc_819x_usb
PHY_Beacon_RSSI_SLID_WIN_MAX	r8192U.h	217;"	d
PHY_REG_1T2RArrayLength	r819xU_phy.h	10;"	d
PHY_RF8256_Config	r8190_rtl8256.c	/^void PHY_RF8256_Config(struct net_device* dev)$/;"	f
PHY_RSSI_SLID_WIN_MAX	r8192U.h	523;"	d
PHY_SetRF8256Bandwidth	r8190_rtl8256.c	/^void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth)	\/\/20M or 40M$/;"	f
PHY_SetRF8256CCKTxPower	r8190_rtl8256.c	/^void PHY_SetRF8256CCKTxPower(struct net_device*	dev, u8	powerlevel)$/;"	f
PHY_SetRF8256OFDMTxPower	r8190_rtl8256.c	/^void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)$/;"	f
PIFS	r8192U.h	/^	u8	PIFS:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
PIFS	r8192U.h	/^        u8	PIFS:1;$/;"	m	struct:_tx_desc_819x_usb
PIFS_TIME	r8192U_hw.h	/^	PIFS_TIME		= 0x04d, \/\/ PIFS time$/;"	e	enum:_RTL8192Usb_HW
PLED_STRATEGY_8190	r8192U.h	/^}LED_STRATEGY_8190, *PLED_STRATEGY_8190;$/;"	t	typeref:enum:_LED_STRATEGY_8190
PMIMOPS_CTRL	r819xU_HTType.h	/^} MIMOPS_CTRL, *PMIMOPS_CTRL;$/;"	t	typeref:struct:_MIMOPS_CTRL
PMIMO_EVM	r819xU_HTType.h	/^}MIMO_EVM, *PMIMO_EVM;$/;"	t	typeref:struct:_MIMO_EVM
PMIMO_RSSI	r819xU_HTType.h	/^}MIMO_RSSI, *PMIMO_RSSI;$/;"	t	typeref:struct:_MIMO_RSSI
PRF90_RADIO_PATH_E	r819xU_phy.h	/^}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;$/;"	t	typeref:enum:_RF90_RADIO_PATH
PRINTABLE	ieee80211.h	564;"	d
PRISM_HDR_SIZE	r8192U.h	521;"	d
PRT_CUSTOMER_ID	r8192U.h	/^}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;$/;"	t	typeref:enum:_RT_CUSTOMER_ID
PRT_HIGH_THROUGHPUT	r819xU_HTType.h	/^}RT_HIGH_THROUGHPUT, *PRT_HIGH_THROUGHPUT;$/;"	t	typeref:struct:_RT_HIGH_THROUGHPUT
PRT_HTINFO_STA_ENTRY	r819xU_HTType.h	/^}RT_HTINFO_STA_ENTRY, *PRT_HTINFO_STA_ENTRY;$/;"	t	typeref:struct:_RT_HTINFO_STA_ENTRY
PRT_RF_TYPE_819xU	r8192U.h	/^}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;$/;"	t	typeref:enum:_RT_RF_TYPE_819xU
PRT_SMOOTH_DATA_4RF	r8192U.h	/^}RT_SMOOTH_DATA_4RF, *PRT_SMOOTH_DATA_4RF;$/;"	t	typeref:struct:_RT_SMOOTH_DATA_4RF
PRX_REORDER_ENTRY	ieee80211.h	/^} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;$/;"	t	typeref:struct:_RX_REORDER_ENTRY
PSMP	r819xU_HTType.h	/^	u8	PSMP:1;$/;"	m	struct:_HT_CAPABILITY_ELE
PSMPAccessOnly	r819xU_HTType.h	/^	u8	PSMPAccessOnly:1;$/;"	m	struct:_HT_INFORMATION_ELE
PSR	r8192U_hw.h	/^	PSR			= 0x0ff, \/\/ Page Select Register$/;"	e	enum:_RTL8192Usb_HW
PTS_ACTION	ieee80211.h	/^} TS_ACTION, *PTS_ACTION;$/;"	t	typeref:enum:_TS_ACTION
PVERSION_819xU	r8192U_hw.h	/^}VERSION_819xU,*PVERSION_819xU;$/;"	t	typeref:enum:_VERSION_819xU
PacketID	r8192U.h	/^	u32		PacketID:13;$/;"	m	struct:_tx_fwinfo_819x_usb
PacketID	r8192U.h	/^	u8	PacketID:7;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
Para1	r819xU_phy.h	/^	u32			Para1;$/;"	m	struct:_SwChnlCmd
Para2	r819xU_phy.h	/^	u32			Para2;$/;"	m	struct:_SwChnlCmd
PartAggr	r8192U.h	/^	u16                 PartAggr:1;$/;"	m	struct:rx_drvinfo_819x_usb
PathA	r819xU_phyreg.h	859;"	d
PathB	r819xU_phyreg.h	860;"	d
PathC	r819xU_phyreg.h	861;"	d
PathD	r819xU_phyreg.h	862;"	d
PcoActive	r819xU_HTType.h	/^	u8	PcoActive:1;$/;"	m	struct:_HT_INFORMATION_ELE
PcoPhase	r819xU_HTType.h	/^	u8	PcoPhase:1;$/;"	m	struct:_HT_INFORMATION_ELE
PeerBandwidth	r819xU_HTType.h	/^	u8				PeerBandwidth;$/;"	m	struct:_RT_HIGH_THROUGHPUT
PeerHTCapBuf	r819xU_HTType.h	/^	u8				PeerHTCapBuf[32];$/;"	m	struct:_RT_HIGH_THROUGHPUT
PeerHTInfoBuf	r819xU_HTType.h	/^	u8				PeerHTInfoBuf[32];$/;"	m	struct:_RT_HIGH_THROUGHPUT
PeerMimoPs	r819xU_HTType.h	/^	u8				PeerMimoPs;$/;"	m	struct:_RT_HIGH_THROUGHPUT
PhyConfig8187	r8180_rtl8225z2.c	/^void PhyConfig8187(struct net_device *dev)$/;"	f
PktSize	r8192U.h	/^	u16	PktSize;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
PktSize	r8192U.h	/^        u16	PktSize;$/;"	m	struct:_tx_desc_819x_usb
QAP_bandwidth	ieee80211.h	/^	QAP_bandwidth	= 0x21, \/\/ 33$/;"	e	enum:_ReasonCode
QOS_AIFSN_MIN_VALUE	ieee80211.h	1214;"	d
QOS_CTL_NOTCONTAIN_ACK	ieee80211.h	1381;"	d
QOS_ELEMENT_ID	ieee80211.h	1210;"	d
QOS_OUI_INFO_SUB_TYPE	ieee80211.h	1211;"	d
QOS_OUI_LEN	ieee80211.h	1208;"	d
QOS_OUI_PARAM_SUB_TYPE	ieee80211.h	1212;"	d
QOS_OUI_TYPE	ieee80211.h	1209;"	d
QOS_QUEUE_NUM	ieee80211.h	1207;"	d
QOS_VERSION_1	ieee80211.h	1213;"	d
QPNR	r8192U_hw.h	/^	QPNR			= 0x1D0, \/\/0x1F0, \/\/ Queue Packet Number report per TID$/;"	e	enum:_RTL8192Usb_HW
QSLT_BE	r8192U.h	176;"	d
QSLT_BEACON	r8192U.h	179;"	d
QSLT_BK	r8192U.h	175;"	d
QSLT_CMD	r8192U.h	182;"	d
QSLT_HIGH	r8192U.h	180;"	d
QSLT_MGNT	r8192U.h	181;"	d
QSLT_VI	r8192U.h	177;"	d
QSLT_VO	r8192U.h	178;"	d
QoS_Enable	ieee80211.h	/^        u8 QoS_Enable;$/;"	m	struct:ieee80211_network
QoS_unspec	ieee80211.h	/^	QoS_unspec		= 0x20, \/\/ 32$/;"	e	enum:_ReasonCode
QueryIsShort	r8192U_core.c	/^u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)$/;"	f
QueueSelect	r8192U.h	/^	u8	QueueSelect:5;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
QueueSelect	r8192U.h	/^	u8	QueueSelect;$/;"	m	struct:_tx_desc_cmd_819x_usb
QueueSelect	r8192U.h	/^        u8	QueueSelect:5;$/;"	m	struct:_tx_desc_819x_usb
R8180_MAX_RETRY	r8192U_hw.h	59;"	d
R8180_PM_H	r8180_pm.h	16;"	d
R8180_WX_H	r8192U_wx.h	16;"	d
R8192_HW	r8192U_hw.h	21;"	d
R819XUSB_CMDPKT_H	r819xU_cmdpkt.h	2;"	d
R819xU_H	r8192U.h	19;"	d
RATE_ALL_CCK	r8192U_hw.h	376;"	d
RATE_ALL_OFDM_1SS	r8192U_hw.h	379;"	d
RATE_ALL_OFDM_2SS	r8192U_hw.h	381;"	d
RATE_ALL_OFDM_AG	r8192U_hw.h	377;"	d
RATE_COUNT	r8192U_wx.c	24;"	d	file:
RATR0	r8192U_hw.h	/^	RATR0			= 0x320, \/\/ Rate Adaptive Table register1$/;"	e	enum:_RTL8192Usb_HW
RATRIndex	ieee80211.h	/^	u8 RATRIndex;$/;"	m	struct:cb_desc
RATR_11M	r8192U_hw.h	347;"	d
RATR_12M	r8192U_hw.h	351;"	d
RATR_18M	r8192U_hw.h	352;"	d
RATR_1M	r8192U_hw.h	344;"	d
RATR_24M	r8192U_hw.h	353;"	d
RATR_2M	r8192U_hw.h	345;"	d
RATR_36M	r8192U_hw.h	354;"	d
RATR_48M	r8192U_hw.h	355;"	d
RATR_54M	r8192U_hw.h	356;"	d
RATR_55M	r8192U_hw.h	346;"	d
RATR_6M	r8192U_hw.h	349;"	d
RATR_9M	r8192U_hw.h	350;"	d
RATR_MCS0	r8192U_hw.h	358;"	d
RATR_MCS1	r8192U_hw.h	359;"	d
RATR_MCS10	r8192U_hw.h	369;"	d
RATR_MCS11	r8192U_hw.h	370;"	d
RATR_MCS12	r8192U_hw.h	371;"	d
RATR_MCS13	r8192U_hw.h	372;"	d
RATR_MCS14	r8192U_hw.h	373;"	d
RATR_MCS15	r8192U_hw.h	374;"	d
RATR_MCS2	r8192U_hw.h	360;"	d
RATR_MCS3	r8192U_hw.h	361;"	d
RATR_MCS4	r8192U_hw.h	362;"	d
RATR_MCS5	r8192U_hw.h	363;"	d
RATR_MCS6	r8192U_hw.h	364;"	d
RATR_MCS7	r8192U_hw.h	365;"	d
RATR_MCS8	r8192U_hw.h	367;"	d
RATR_MCS9	r8192U_hw.h	368;"	d
RATid	r8192U.h	/^	u8	RATid:3;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
RATid	r8192U.h	/^        u8	RATid:3;$/;"	m	struct:_tx_desc_819x_usb
RCAMO	r8192U_hw.h	/^	RCAMO			= 0x0A8, \/\/ Software read\/write CAM config$/;"	e	enum:_RTL8192Usb_HW
RCQDA	r8192U_hw.h	/^	RCQDA			= 0x224, \/\/ Receive command Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
RCR	r8192U_hw.h	/^	RCR			= 0x044, \/\/ Receive Configuration Register$/;"	e	enum:_RTL8192Usb_HW
RCR_AAP	r8192U_hw.h	169;"	d
RCR_AB	r8192U_hw.h	166;"	d
RCR_ACF	r8192U_hw.h	161;"	d
RCR_ACKTXBW	r8192U_hw.h	156;"	d
RCR_ACRC32	r8192U_hw.h	165;"	d
RCR_ADD3	r8192U_hw.h	159;"	d
RCR_ADF	r8192U_hw.h	162;"	d
RCR_AICV	r8192U_hw.h	164;"	d
RCR_AM	r8192U_hw.h	167;"	d
RCR_AMF	r8192U_hw.h	160;"	d
RCR_APM	r8192U_hw.h	168;"	d
RCR_APWRMGT	r8192U_hw.h	158;"	d
RCR_CBSSID	r8192U_hw.h	157;"	d
RCR_ENCS1	r8192U_hw.h	154;"	d
RCR_ENCS2	r8192U_hw.h	153;"	d
RCR_ENMBID	r8192U_hw.h	155;"	d
RCR_FIFO_OFFSET	r8192U_hw.h	151;"	d
RCR_MXDMA_OFFSET	r8192U_hw.h	150;"	d
RCR_ONLYERLPKT	r8192U_hw.h	152;"	d
RCR_RXFTH	r8192U_hw.h	163;"	d
RDQDA	r8192U_hw.h	/^	RDQDA			= 0x228, \/\/ Receive Queue Descriptor Start Address $/;"	e	enum:_RTL8192Usb_HW
REORDER_ENTRY_NUM	ieee80211.h	1623;"	d
REORDER_WIN_SIZE	ieee80211.h	1622;"	d
RETRY_LIMIT	r8192U_hw.h	/^	RETRY_LIMIT		= 0x304, \/\/ Retry Limit [15:8]-short, [7:0]-long$/;"	e	enum:_RTL8192Usb_HW
RETRY_LIMIT_LONG_SHIFT	r8192U_hw.h	307;"	d
RETRY_LIMIT_SHORT_SHIFT	r8192U_hw.h	306;"	d
RF90_PATH_A	r819xU_phy.h	/^	RF90_PATH_A = 0,			\/\/Radio Path A$/;"	e	enum:_RF90_RADIO_PATH
RF90_PATH_B	r819xU_phy.h	/^	RF90_PATH_B = 1,			\/\/Radio Path B$/;"	e	enum:_RF90_RADIO_PATH
RF90_PATH_C	r819xU_phy.h	/^	RF90_PATH_C = 2,			\/\/Radio Path C$/;"	e	enum:_RF90_RADIO_PATH
RF90_PATH_D	r819xU_phy.h	/^	RF90_PATH_D = 3,			\/\/Radio Path D$/;"	e	enum:_RF90_RADIO_PATH
RF90_PATH_MAX	r819xU_phy.h	/^	RF90_PATH_MAX				\/\/Max RF number 92 support $/;"	e	enum:_RF90_RADIO_PATH
RF90_RADIO_PATH_E	r819xU_phy.h	/^}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;$/;"	t	typeref:enum:_RF90_RADIO_PATH
RFPC	r8192U_hw.h	/^	RFPC			= 0x05F, \/\/ Rx FIFO Packet Count$/;"	e	enum:_RTL8192Usb_HW
RFProgType	r8192U.h	/^	u8	RFProgType;$/;"	m	struct:r8192_priv
RF_1T2R	r8192U_hw.h	/^	RF_1T2R = 0,$/;"	e	enum:_RT_RF_TYPE_DEF
RF_2T4R	r8192U_hw.h	/^	RF_2T4R,$/;"	e	enum:_RT_RF_TYPE_DEF
RF_819X_MAX_TYPE	r8192U_hw.h	/^	RF_819X_MAX_TYPE$/;"	e	enum:_RT_RF_TYPE_DEF
RF_8225	r8192U.h	/^        RF_8225,$/;"	e	enum:_RT_RF_TYPE_819xU
RF_8256	r8192U.h	/^        RF_8256,$/;"	e	enum:_RT_RF_TYPE_819xU
RF_8258	r8192U.h	/^        RF_8258,$/;"	e	enum:_RT_RF_TYPE_819xU
RF_CHANNEL_TABLE_ZEBRA	r819xU_phy.c	/^static u32 RF_CHANNEL_TABLE_ZEBRA[] = {$/;"	v	file:
RF_DATA	r819xU_phyreg.h	5;"	d
RF_PSEUDO_11N	r8192U.h	/^        RF_PSEUDO_11N = 4,$/;"	e	enum:_RT_RF_TYPE_819xU
RF_TYPE_MIN	r8192U.h	/^        RF_TYPE_MIN = 0,$/;"	e	enum:_RT_RF_TYPE_819xU
RIFS	r819xU_HTType.h	/^	u8	RIFS:1;$/;"	m	struct:_HT_INFORMATION_ELE
RQPN1	r8192U_hw.h	/^	RQPN1			= 0x180, \/\/ Reserved Queue Page Number , Vo Vi, Be, Bk$/;"	e	enum:_RTL8192Usb_HW
RQPN2	r8192U_hw.h	/^	RQPN2			= 0x184, \/\/ Reserved Queue Page Number, HCCA, Cmd, Mgnt, High$/;"	e	enum:_RTL8192Usb_HW
RQPN3	r8192U_hw.h	/^	RQPN3			= 0x188, \/\/ Reserved Queue Page Number, Bcn, Public, $/;"	e	enum:_RTL8192Usb_HW
RRSR	r8192U_hw.h	/^	RRSR			= 0x310, \/\/ Response Rate Set$/;"	e	enum:_RTL8192Usb_HW
RRSR_11M	r8192U_hw.h	319;"	d
RRSR_12M	r8192U_hw.h	322;"	d
RRSR_18M	r8192U_hw.h	323;"	d
RRSR_1M	r8192U_hw.h	316;"	d
RRSR_24M	r8192U_hw.h	324;"	d
RRSR_2M	r8192U_hw.h	317;"	d
RRSR_36M	r8192U_hw.h	325;"	d
RRSR_48M	r8192U_hw.h	326;"	d
RRSR_54M	r8192U_hw.h	327;"	d
RRSR_5_5M	r8192U_hw.h	318;"	d
RRSR_6M	r8192U_hw.h	320;"	d
RRSR_9M	r8192U_hw.h	321;"	d
RRSR_MCS0	r8192U_hw.h	328;"	d
RRSR_MCS1	r8192U_hw.h	329;"	d
RRSR_MCS2	r8192U_hw.h	330;"	d
RRSR_MCS3	r8192U_hw.h	331;"	d
RRSR_MCS4	r8192U_hw.h	332;"	d
RRSR_MCS5	r8192U_hw.h	333;"	d
RRSR_MCS6	r8192U_hw.h	334;"	d
RRSR_MCS7	r8192U_hw.h	335;"	d
RRSR_RSC_DUPLICATE	r8192U_hw.h	312;"	d
RRSR_RSC_LOWSUBCHNL	r8192U_hw.h	313;"	d
RRSR_RSC_OFFSET	r8192U_hw.h	310;"	d
RRSR_RSC_UPSUBCHANL	r8192U_hw.h	314;"	d
RRSR_SHORT	r8192U_hw.h	315;"	d
RRSR_SHORT_OFFSET	r8192U_hw.h	311;"	d
RSVD2	r8192U.h	/^	RSVD2,$/;"	e	enum:__anon15
RSVD3	r8192U.h	/^	RSVD3,$/;"	e	enum:__anon15
RSVD4	r8192U.h	/^	RSVD4,$/;"	e	enum:__anon15
RSVD5	r8192U.h	/^	RSVD5,$/;"	e	enum:__anon15
RSVD_FW_QUEUE_PAGE_BCN_SHIFT	r8192U.h	504;"	d
RSVD_FW_QUEUE_PAGE_BE_SHIFT	r8192U.h	499;"	d
RSVD_FW_QUEUE_PAGE_BK_SHIFT	r8192U.h	498;"	d
RSVD_FW_QUEUE_PAGE_CMD_SHIFT	r8192U.h	503;"	d
RSVD_FW_QUEUE_PAGE_MGNT_SHIFT	r8192U.h	502;"	d
RSVD_FW_QUEUE_PAGE_PUB_SHIFT	r8192U.h	505;"	d
RSVD_FW_QUEUE_PAGE_VI_SHIFT	r8192U.h	500;"	d
RSVD_FW_QUEUE_PAGE_VO_SHIFT	r8192U.h	501;"	d
RTK_DL_EDCA	r8192U_dm.c	47;"	d	file:
RTK_UL_EDCA	r8192U_dm.c	46;"	d	file:
RTL8187_REQT_READ	r8192U_hw.h	51;"	d
RTL8187_REQT_WRITE	r8192U_hw.h	52;"	d
RTL8187_REQ_GET_REGS	r8192U_hw.h	53;"	d
RTL8187_REQ_SET_REGS	r8192U_hw.h	54;"	d
RTL8190_CPU_START_OFFSET	r819xU_firmware.h	4;"	d
RTL8190_EEPROM_ID	r8192U_hw.h	78;"	d
RTL8190_MAX_FIRMWARE_CODE_SIZE	r8192U.h	472;"	d
RTL819X_DEFAULT_RF_TYPE	r8192U.h	214;"	d
RTL819X_TOTAL_RF_PATH	r8190_rtl8256.h	16;"	d
RTL819xU_CCK_LOOPBACK	r8192U.h	/^	RTL819xU_CCK_LOOPBACK = 3,$/;"	e	enum:_rtl819xUsb_loopback
RTL819xU_DMA_LOOPBACK	r8192U.h	/^	RTL819xU_DMA_LOOPBACK = 2,$/;"	e	enum:_rtl819xUsb_loopback
RTL819xU_MAC_LOOPBACK	r8192U.h	/^	RTL819xU_MAC_LOOPBACK = 1,$/;"	e	enum:_rtl819xUsb_loopback
RTL819xU_MODULE_NAME	r8192U.h	46;"	d
RTL819xU_NO_LOOPBACK	r8192U.h	/^	RTL819xU_NO_LOOPBACK = 0,$/;"	e	enum:_rtl819xUsb_loopback
RTL819x_DEBUG	r8192U.h	143;"	d
RTL8225H	r8180_rtl8225.h	14;"	d
RTL8225H	r8190_rtl8256.h	14;"	d
RTL8225_ANAPARAM2_OFF	r8180_rtl8225.h	22;"	d
RTL8225_ANAPARAM2_ON	r8180_rtl8225.h	24;"	d
RTL8225_ANAPARAM_OFF	r8180_rtl8225.h	21;"	d
RTL8225_ANAPARAM_ON	r8180_rtl8225.h	18;"	d
RTL8225_RF_DEF_SENS	r8180_rtl8225.h	41;"	d
RTL8225_RF_MAX_SENS	r8180_rtl8225.h	40;"	d
RTL_IOCTL_WPA_SUPPLICANT	r8192U.h	567;"	d
RTSSC	ieee80211.h	/^        u8 RTSSC:1;$/;"	m	struct:cb_desc
RT_ASOC_RETRY_LIMIT	ieee80211.h	2463;"	d
RT_CID_8187_ALPHA0	r8192U.h	/^	RT_CID_8187_ALPHA0 = 1,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_8187_HW_LED	r8192U.h	/^	RT_CID_8187_HW_LED = 3,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_8187_NETGEAR	r8192U.h	/^	RT_CID_8187_NETGEAR = 4,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_8187_SERCOMM_PS	r8192U.h	/^	RT_CID_8187_SERCOMM_PS = 2,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_819x_CAMEO	r8192U.h	/^	RT_CID_819x_CAMEO  = 6, $/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_819x_Netcore	r8192U.h	/^	RT_CID_819x_Netcore = 10,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_819x_RUNTOP	r8192U.h	/^	RT_CID_819x_RUNTOP = 7,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_819x_Senao	r8192U.h	/^	RT_CID_819x_Senao = 8,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_DEFAULT	r8192U.h	/^	RT_CID_DEFAULT = 0,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_DLINK	r8192U.h	/^	RT_CID_DLINK = 12,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_Nettronix	r8192U.h	/^	RT_CID_Nettronix = 11,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_PRONET	r8192U.h	/^	RT_CID_PRONET = 13,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_TOSHIBA	r8192U.h	/^	RT_CID_TOSHIBA = 9,	\/\/ Merge by Jacken, 2008\/01\/31.$/;"	e	enum:_RT_CUSTOMER_ID
RT_CID_WHQL	r8192U.h	/^	RT_CID_WHQL = 5,$/;"	e	enum:_RT_CUSTOMER_ID
RT_CUSTOMER_ID	r8192U.h	/^}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;$/;"	t	typeref:enum:_RT_CUSTOMER_ID
RT_DEBUG_DATA	r8192U.h	152;"	d
RT_DEBUG_DATA	r8192U.h	168;"	d
RT_HIGH_THROUGHPUT	r819xU_HTType.h	/^}RT_HIGH_THROUGHPUT, *PRT_HIGH_THROUGHPUT;$/;"	t	typeref:struct:_RT_HIGH_THROUGHPUT
RT_HTINFO_STA_ENTRY	r819xU_HTType.h	/^}RT_HTINFO_STA_ENTRY, *PRT_HTINFO_STA_ENTRY;$/;"	t	typeref:struct:_RT_HTINFO_STA_ENTRY
RT_RF_POWER_STATE	r8192U.h	/^}RT_RF_POWER_STATE;$/;"	t	typeref:enum:_RT_RF_POWER_STATE
RT_RF_TYPE_819xU	r8192U.h	/^}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;$/;"	t	typeref:enum:_RT_RF_TYPE_819xU
RT_RF_TYPE_DEF	r8192U_hw.h	/^}RT_RF_TYPE_DEF;$/;"	t	typeref:enum:_RT_RF_TYPE_DEF
RT_SMOOTH_DATA_4RF	r8192U.h	/^}RT_SMOOTH_DATA_4RF, *PRT_SMOOTH_DATA_4RF;$/;"	t	typeref:struct:_RT_SMOOTH_DATA_4RF
RT_STATUS_FAILURE	r819xU_cmdpkt.c	/^	RT_STATUS_FAILURE,$/;"	e	enum:_rt_status	file:
RT_STATUS_PENDING	r819xU_cmdpkt.c	/^	RT_STATUS_PENDING,$/;"	e	enum:_rt_status	file:
RT_STATUS_RESOURCE	r819xU_cmdpkt.c	/^	RT_STATUS_RESOURCE$/;"	e	enum:_rt_status	file:
RT_STATUS_SUCCESS	r819xU_cmdpkt.c	/^	RT_STATUS_SUCCESS,$/;"	e	enum:_rt_status	file:
RT_TRACE	r8192U.h	97;"	d
RWCAM	r8192U_hw.h	/^	RWCAM			= 0x0A0, \/\/IN 8190 Data Sheet is called CAMcmd$/;"	e	enum:_RTL8192Usb_HW
RX_CMD_ELE_MAX	r819xU_cmdpkt.h	/^    RX_CMD_ELE_MAX$/;"	e	enum:tag_command_packet_directories
RX_DBGINFO_FEEDBACK	r819xU_cmdpkt.h	/^    RX_DBGINFO_FEEDBACK		= 5,$/;"	e	enum:tag_command_packet_directories
RX_DONT_PASS_UL	r8192U_core.c	43;"	d	file:
RX_FIFO_THRESHOLD_1024	r8192U_hw.h	147;"	d
RX_FIFO_THRESHOLD_128	r8192U_hw.h	144;"	d
RX_FIFO_THRESHOLD_256	r8192U_hw.h	145;"	d
RX_FIFO_THRESHOLD_512	r8192U_hw.h	146;"	d
RX_FIFO_THRESHOLD_MASK	r8192U_hw.h	142;"	d
RX_FIFO_THRESHOLD_NONE	r8192U_hw.h	148;"	d
RX_FIFO_THRESHOLD_SHIFT	r8192U_hw.h	143;"	d
RX_INTERRUPT_STATUS	r819xU_cmdpkt.h	/^    RX_INTERRUPT_STATUS		= 1,$/;"	e	enum:tag_command_packet_directories
RX_REORDER_ENTRY	ieee80211.h	/^} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;$/;"	t	typeref:struct:_RX_REORDER_ENTRY
RX_TX_FEEDBACK	r819xU_cmdpkt.h	/^    RX_TX_FEEDBACK = 0,$/;"	e	enum:tag_command_packet_directories
RX_TX_PER_PKT_FEEDBACK	r819xU_cmdpkt.h	/^    RX_TX_PER_PKT_FEEDBACK		= 6,$/;"	e	enum:tag_command_packet_directories
RX_TX_RATE_HISTORY	r819xU_cmdpkt.h	/^    RX_TX_RATE_HISTORY		= 7,$/;"	e	enum:tag_command_packet_directories
RX_TX_STATUS	r819xU_cmdpkt.h	/^    RX_TX_STATUS				= 4,$/;"	e	enum:tag_command_packet_directories
RX_URB_SIZE	r8192U_hw.h	62;"	d
RadioA_ArrayLength	r819xU_phy.h	14;"	d
RadioB_ArrayLength	r819xU_phy.h	15;"	d
RadioC_ArrayLength	r819xU_phy.h	16;"	d
RadioD_ArrayLength	r819xU_phy.h	17;"	d
RateAdaptiveTH_High	r8192U_dm.h	45;"	d
RateAdaptiveTH_Low_20M	r8192U_dm.h	46;"	d
RateAdaptiveTH_Low_40M	r8192U_dm.h	47;"	d
ReceiveConfig	r8192U.h	/^	u32	ReceiveConfig;$/;"	m	struct:r8192_priv
RecommemdedTxWidth	r819xU_HTType.h	/^	u8	RecommemdedTxWidth:1;$/;"	m	struct:_HT_INFORMATION_ELE
RecvSignalPower	ieee80211.h	/^	s32       RecvSignalPower; \/\/ Real power in dBm for this packet, no beautification and aggregation.$/;"	m	struct:ieee80211_rx_stats
RegC38_Default	r8192U_dm.c	3403;"	d	file:
RegC38_Fsync_AP_BCM	r8192U_dm.c	3405;"	d	file:
RegC38_NonFsync_Other_AP	r8192U_dm.c	3404;"	d	file:
RegC38_TH	r8192U_dm.h	60;"	d
RegCWinMin	r8192U.h	/^	u8	RegCWinMin;		\/\/ For turbo mode CW adaptive. Added by Annie, 2005-10-27.$/;"	m	struct:r8192_priv
RegHTSuppRateSet	ieee80211.h	/^	u8	RegHTSuppRateSet[16];$/;"	m	struct:ieee80211_device
Regdot11HTOperationalRateSet	ieee80211.h	/^	u8	Regdot11HTOperationalRateSet[16];		\/\/use RATR format$/;"	m	struct:ieee80211_device
Reserved	r819xU_HTType.h	/^	u8	Reserved:6;$/;"	m	struct:_MIMOPS_CTRL
Reserved0	ieee80211.h	/^	u16       Reserved0:1;    \/\/for rtl8185$/;"	m	struct:ieee80211_rx_stats
Reserved0	r8192U.h	/^	u16	Reserved0;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved0	r8192U.h	/^        u8	Reserved0:3;$/;"	m	struct:_tx_desc_819x_usb
Reserved1	r8192U.h	/^	u16                 Reserved1:12;$/;"	m	struct:rx_drvinfo_819x_usb
Reserved1	r8192U.h	/^	u8			Reserved1:4;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
Reserved1	r8192U.h	/^	u8	Reserved1:2;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
Reserved1	r8192U.h	/^	u8	Reserved1;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved1	r8192U.h	/^	u8                  Reserved1:4;$/;"	m	struct:rx_desc_819x_usb
Reserved1	r8192U.h	/^        u32		Reserved1:2;$/;"	m	struct:_tx_fwinfo_819x_usb
Reserved1	r8192U.h	/^        u8	Reserved1:2;$/;"	m	struct:_tx_desc_819x_usb
Reserved2	r8192U.h	/^	u16                 Reserved2:2;$/;"	m	struct:rx_drvinfo_819x_usb
Reserved2	r8192U.h	/^	u32                 Reserved2;$/;"	m	struct:rx_desc_819x_usb
Reserved2	r8192U.h	/^	u8			Reserved2;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
Reserved2	r8192U.h	/^	u8	Reserved2:3;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved3	r8192U.h	/^	u16			Reserved3;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
Reserved3	r8192U.h	/^	u8	Reserved3;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved3	r8192U.h	/^	u8                  Reserved3:2;$/;"	m	struct:rx_drvinfo_819x_usb
Reserved3	r8192U.h	/^        u8	Reserved3:1;$/;"	m	struct:_tx_desc_819x_usb
Reserved4	r8192U.h	/^	u8	Reserved4;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved4	r8192U.h	/^	u8                  Reserved4:1;$/;"	m	struct:rx_drvinfo_819x_usb
Reserved4	r8192U.h	/^        u8	Reserved4;$/;"	m	struct:_tx_desc_819x_usb
Reserved5	r8192U.h	/^	u16	Reserved5;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved5	r8192U.h	/^        u32	Reserved5;$/;"	m	struct:_tx_desc_819x_usb
Reserved6	r8192U.h	/^	u32	Reserved6;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved6	r8192U.h	/^        u32	Reserved6;$/;"	m	struct:_tx_desc_819x_usb
Reserved7	r8192U.h	/^	u32	Reserved7;$/;"	m	struct:_tx_desc_cmd_819x_usb
Reserved7	r8192U.h	/^        u32	Reserved7;$/;"	m	struct:_tx_desc_819x_usb
Reserved8	r8192U.h	/^	u32	Reserved8;$/;"	m	struct:_tx_desc_cmd_819x_usb
ResvForPaddingLen	r8192U.h	/^        u8	ResvForPaddingLen:7;$/;"	m	struct:_tx_desc_819x_usb
Revd1	r819xU_HTType.h	/^	u8	Revd1:5;$/;"	m	struct:_HT_INFORMATION_ELE
Revd2	r819xU_HTType.h	/^	u8	Revd2:8;$/;"	m	struct:_HT_INFORMATION_ELE
RfReg0Value	r8192U.h	/^	u32					RfReg0Value[4];$/;"	m	struct:r8192_priv
RightAntenna	r819xU_phyreg.h	831;"	d
Rsvd1	r819xU_HTType.h	/^	u8	Rsvd1:1;$/;"	m	struct:_HT_CAPABILITY_ELE
Rsvd2	r819xU_HTType.h	/^	u8	Rsvd2:3;$/;"	m	struct:_HT_CAPABILITY_ELE
Rsvd3	r819xU_HTType.h	/^	u8	Rsvd3:6;$/;"	m	struct:_HT_INFORMATION_ELE
Rsvd4	r819xU_HTType.h	/^	u8	Rsvd4:4;$/;"	m	struct:_HT_INFORMATION_ELE
RtsBandwidth	r8192U.h	/^        u8		RtsBandwidth:1;         \/\/ This is used for HT MCS rate only.$/;"	m	struct:_tx_fwinfo_819x_usb
RtsEnable	r8192U.h	/^        u8		RtsEnable:1;$/;"	m	struct:_tx_fwinfo_819x_usb
RtsHT	r8192U.h	/^        u8		RtsHT:1;                \/\/Interpre RtsRate field as high throughput data rate$/;"	m	struct:_tx_fwinfo_819x_usb
RtsRate	r8192U.h	/^        u8		RtsRate:7;$/;"	m	struct:_tx_fwinfo_819x_usb
RtsSTBC	r8192U.h	/^        u8		RtsSTBC:2;$/;"	m	struct:_tx_fwinfo_819x_usb
RtsShort	r8192U.h	/^        u8		RtsShort:1;             \/\/Short PLCP for CCK, or short GI for 11n MCS$/;"	m	struct:_tx_fwinfo_819x_usb
RtsSubcarrier	r8192U.h	/^        u8		RtsSubcarrier:2;        \/\/ This is used for legacy OFDM rate only.$/;"	m	struct:_tx_fwinfo_819x_usb
RxAMD	r8192U.h	/^        u32		RxAMD:3;$/;"	m	struct:_tx_fwinfo_819x_usb
RxBufShift	ieee80211.h	/^	u8        RxBufShift;$/;"	m	struct:ieee80211_rx_stats
RxDrvInfoSize	ieee80211.h	/^	u8        RxDrvInfoSize;$/;"	m	struct:ieee80211_rx_stats
RxDrvInfoSize	r8192U.h	/^	u8			RxDrvInfoSize;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
RxDrvInfoSize	r8192U.h	/^	u8                  RxDrvInfoSize;$/;"	m	struct:rx_desc_819x_usb
RxHT	r8192U.h	/^	u8                  RxHT:1;$/;"	m	struct:rx_drvinfo_819x_usb
RxIs40MHzPacket	ieee80211.h	/^	bool      RxIs40MHzPacket;$/;"	m	struct:ieee80211_rx_stats
RxMF	r8192U.h	/^        u32		RxMF:2;$/;"	m	struct:_tx_fwinfo_819x_usb
RxMIMOSignalQuality	ieee80211.h	/^	s8        RxMIMOSignalQuality[2];$/;"	m	struct:ieee80211_rx_stats
RxMIMOSignalStrength	ieee80211.h	/^	u8        RxMIMOSignalStrength[4];        \/\/ in 0~100 index$/;"	m	struct:ieee80211_rx_stats
RxPWDBAll	ieee80211.h	/^	u32       RxPWDBAll;$/;"	m	struct:ieee80211_rx_stats
RxPathSelection_SS_TH_low	r8192U_dm.h	42;"	d
RxPathSelection_diff_TH	r8192U_dm.h	43;"	d
RxPower	ieee80211.h	/^	s8        RxPower; \/\/ in dBm Translate from PWdB$/;"	m	struct:ieee80211_rx_stats
RxRate	r8192U.h	/^	u8                  RxRate:7;$/;"	m	struct:rx_drvinfo_819x_usb
RxReorderDropCounter	r819xU_HTType.h	/^	u16				RxReorderDropCounter;$/;"	m	struct:_RT_HIGH_THROUGHPUT
RxReorderEntry	ieee80211.h	/^	RX_REORDER_ENTRY	RxReorderEntry[128];$/;"	m	struct:ieee80211_device
RxReorderPendingTime	r819xU_HTType.h	/^	u8				RxReorderPendingTime;$/;"	m	struct:_RT_HIGH_THROUGHPUT
RxReorderWinSize	r819xU_HTType.h	/^	u8				RxReorderWinSize;$/;"	m	struct:_RT_HIGH_THROUGHPUT
RxReorder_Unused_List	ieee80211.h	/^	struct list_head		RxReorder_Unused_List;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
RxSTBC	r819xU_HTType.h	/^	u8	RxSTBC:2;$/;"	m	struct:_HT_CAPABILITY_ELE
RxTsRecord	ieee80211.h	/^	RX_TS_RECORD		RxTsRecord[TOTAL_TS_NUM];$/;"	m	struct:ieee80211_device
Rx_Smooth_Factor	r8192U.h	87;"	d
Rx_TS_Admit_List	ieee80211.h	/^	struct list_head		Rx_TS_Admit_List;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
Rx_TS_Pending_List	ieee80211.h	/^	struct list_head		Rx_TS_Pending_List;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
Rx_TS_Unused_List	ieee80211.h	/^	struct list_head		Rx_TS_Unused_List;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
SCM_KEY_LEN	ieee80211.h	939;"	d
SCM_TEMPORAL_KEY_LENGTH	ieee80211.h	940;"	d
SCR_NoSKMC	r8192U_hw.h	197;"	d
SCR_RxDecEnable	r8192U_hw.h	195;"	d
SCR_RxSecEnable	r8192U_hw.h	200;"	d
SCR_RxUseDK	r8192U_hw.h	193;"	d
SCR_SKByA2	r8192U_hw.h	196;"	d
SCR_TxEncEnable	r8192U_hw.h	194;"	d
SCR_TxSecEnable	r8192U_hw.h	199;"	d
SCR_TxUseDK	r8192U_hw.h	192;"	d
SCR_UseDK	r8192U_hw.h	198;"	d
SC_MODE_DUPLICATE	r819xU_HTType.h	/^	SC_MODE_DUPLICATE = 0,$/;"	e	enum:_HT_Bandwidth_40MHZ_Sub_Carrier
SC_MODE_FULL40MHZ	r819xU_HTType.h	/^	SC_MODE_FULL40MHZ = 3,$/;"	e	enum:_HT_Bandwidth_40MHZ_Sub_Carrier
SC_MODE_LOWER	r819xU_HTType.h	/^	SC_MODE_LOWER = 1,$/;"	e	enum:_HT_Bandwidth_40MHZ_Sub_Carrier
SC_MODE_UPPER	r819xU_HTType.h	/^	SC_MODE_UPPER = 2,$/;"	e	enum:_HT_Bandwidth_40MHZ_Sub_Carrier
SECR	r8192U_hw.h	/^	SECR			= 0x0B0, \/\/Security Configuration Register$/;"	e	enum:_RTL8192Usb_HW
SEC_ACTIVE_KEY	ieee80211.h	919;"	d
SEC_ALG_CCMP	ieee80211.h	935;"	d
SEC_ALG_NONE	ieee80211.h	932;"	d
SEC_ALG_TKIP	ieee80211.h	934;"	d
SEC_ALG_WEP	ieee80211.h	933;"	d
SEC_AUTH_MODE	ieee80211.h	920;"	d
SEC_ENABLED	ieee80211.h	923;"	d
SEC_ENCRYPT	ieee80211.h	924;"	d
SEC_KEY_1	ieee80211.h	915;"	d
SEC_KEY_2	ieee80211.h	916;"	d
SEC_KEY_3	ieee80211.h	917;"	d
SEC_KEY_4	ieee80211.h	918;"	d
SEC_LEVEL	ieee80211.h	922;"	d
SEC_LEVEL_0	ieee80211.h	926;"	d
SEC_LEVEL_1	ieee80211.h	927;"	d
SEC_LEVEL_2	ieee80211.h	928;"	d
SEC_LEVEL_2_CKIP	ieee80211.h	929;"	d
SEC_LEVEL_3	ieee80211.h	930;"	d
SEC_UNICAST_GROUP	ieee80211.h	921;"	d
SHORT_SLOT_TIME	r8192U_core.c	2153;"	d	file:
SIFS	r8192U_hw.h	/^	SIFS			= 0x03E, \/\/ SIFS register$/;"	e	enum:_RTL8192Usb_HW
SIFS_Timer	r8192U.h	/^	u16 SIFS_Timer;$/;"	m	struct:ChnlAccessSetting
SLOT_TIME	r8192U_hw.h	/^	SLOT_TIME		= 0x049, \/\/ Slot Time Register$/;"	e	enum:_RTL8192Usb_HW
SNAP_SIZE	ieee80211.h	618;"	d
SN_EQUAL	ieee80211.h	440;"	d
SN_LESS	ieee80211.h	439;"	d
SPLCP	r8192U.h	/^	u8                  SPLCP:1;$/;"	m	struct:rx_drvinfo_819x_usb
SS_TH_low	r8192U_dm.h	/^	u8		SS_TH_low;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
STBC	r8192U.h	/^        u8		STBC:2;$/;"	m	struct:_tx_fwinfo_819x_usb
SWDec	r8192U.h	/^	u8			SWDec:1;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
SWDec	r8192U.h	/^	u8                  SWDec:1;$/;"	m	struct:rx_desc_819x_usb
SW_Fsync	ieee80211.h	/^	SW_Fsync$/;"	e	enum:_Fsync_State
SW_LED_MODE0	r8192U.h	/^	SW_LED_MODE0, \/\/ SW control 1 LED via GPIO0. It is default option.$/;"	e	enum:_LED_STRATEGY_8190
SW_LED_MODE1	r8192U.h	/^	SW_LED_MODE1, \/\/ SW control for PCI Express$/;"	e	enum:_LED_STRATEGY_8190
SW_LED_MODE2	r8192U.h	/^	SW_LED_MODE2, \/\/ SW control for Cameo.$/;"	e	enum:_LED_STRATEGY_8190
SW_LED_MODE3	r8192U.h	/^	SW_LED_MODE3, \/\/ SW contorl for RunTop.$/;"	e	enum:_LED_STRATEGY_8190
SW_LED_MODE4	r8192U.h	/^	SW_LED_MODE4, \/\/ SW control for Netcore$/;"	e	enum:_LED_STRATEGY_8190
SecCAMID	r8192U.h	/^	u8	SecCAMID:5;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
SecCAMID	r8192U.h	/^        u8	SecCAMID:5;$/;"	m	struct:_tx_desc_819x_usb
SecDescAssign	r8192U.h	/^	u8	SecDescAssign:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
SecDescAssign	r8192U.h	/^        u8	SecDescAssign:1;$/;"	m	struct:_tx_desc_819x_usb
SecType	r8192U.h	/^	u8	SecType:2;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
SecType	r8192U.h	/^        u8	SecType:2;$/;"	m	struct:_tx_desc_819x_usb
SecondaryBeacon	r819xU_HTType.h	/^	u8	SecondaryBeacon:1;$/;"	m	struct:_HT_INFORMATION_ELE
SelfHTCap	r819xU_HTType.h	/^	HT_CAPABILITY_ELE	SelfHTCap;					\/\/ This is HT cap element sent to peer STA, which also indicate HT Rx capabilities.$/;"	m	struct:_RT_HIGH_THROUGHPUT
SelfHTInfo	r819xU_HTType.h	/^	HT_INFORMATION_ELE	SelfHTInfo;					\/\/ This is HT info element sent to peer STA, which also indicate HT Rx capabilities.$/;"	m	struct:_RT_HIGH_THROUGHPUT
SelfMimoPs	r819xU_HTType.h	/^	u8				SelfMimoPs;$/;"	m	struct:_RT_HIGH_THROUGHPUT
SeqNum	ieee80211.h	/^	u16			SeqNum;$/;"	m	struct:_RX_REORDER_ENTRY
Seq_Num	ieee80211.h	/^	u16		  Seq_Num;$/;"	m	struct:ieee80211_rx_stats
SetBWModeHandler	ieee80211.h	/^	void (*SetBWModeHandler)(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);$/;"	m	struct:ieee80211_device
SetBWModeInProgress	r8192U.h	/^	u8	SetBWModeInProgress;$/;"	m	struct:r8192_priv
SetBWModeWorkItem	r8192U.h	/^	struct work_struct SetBWModeWorkItem;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
SetRFPowerStateInProgress	r8192U.h	/^	bool				SetRFPowerStateInProgress;$/;"	m	struct:r8192_priv
SetWirelessMode	ieee80211.h	/^	void (*SetWirelessMode)(struct net_device* dev, u8 wireless_mode);$/;"	m	struct:ieee80211_device
SetupRFEInitialTiming	r8180_rtl8225z2.c	/^SetupRFEInitialTiming(struct net_device*  dev)$/;"	f
Shift	r8192U.h	/^	u8			Shift:2;$/;"	m	struct:_rx_desc_819x_usb_aggr_subframe
Shift	r8192U.h	/^	u8                  Shift:2;$/;"	m	struct:rx_desc_819x_usb
Short	r8192U.h	/^        u8		Short:1;                \/\/Short PLCP for CCK, or short GI for 11n MCS$/;"	m	struct:_tx_fwinfo_819x_usb
ShortGI20Mhz	r819xU_HTType.h	/^	u8	ShortGI20Mhz:1;$/;"	m	struct:_HT_CAPABILITY_ELE
ShortGI40Mhz	r819xU_HTType.h	/^	u8	ShortGI40Mhz:1;$/;"	m	struct:_HT_CAPABILITY_ELE
ShortRetryLimit	r8192U.h	/^	u16	ShortRetryLimit;$/;"	m	struct:r8192_priv
SignalQuality	ieee80211.h	/^	u8        SignalQuality; \/\/ in 0-100 index. $/;"	m	struct:ieee80211_rx_stats
SignalStrength	ieee80211.h	/^	u8        SignalStrength; \/\/ in 0-100 index.$/;"	m	struct:ieee80211_rx_stats
Slide_Beacon_Total	r8192U.h	/^	u32 Slide_Beacon_Total;         \/\/cosa add for beacon rssi$/;"	m	struct:Stats
Slide_Beacon_pwdb	r8192U.h	/^	u32 Slide_Beacon_pwdb[100];     \/\/cosa add for beacon rssi$/;"	m	struct:Stats
SlotTimeTimer	r8192U.h	/^	u16 SlotTimeTimer;$/;"	m	struct:ChnlAccessSetting
SrvIntGranularity	r819xU_HTType.h	/^	u8	SrvIntGranularity:3;$/;"	m	struct:_HT_INFORMATION_ELE
Stats	r8192U.h	/^typedef struct Stats$/;"	s
Stats	r8192U.h	/^} Stats;$/;"	t	typeref:struct:Stats
SwBwStep	r819xU_HTType.h	/^	u8				SwBwStep;$/;"	m	struct:_RT_HIGH_THROUGHPUT
SwBwTimer	ieee80211.h	/^	struct timer_list		SwBwTimer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
SwBwTimer	r819xU_HTType.h	/^	struct timer_list		SwBwTimer;$/;"	m	struct:_RT_HIGH_THROUGHPUT	typeref:struct:_RT_HIGH_THROUGHPUT::timer_list
SwChnlCmd	r819xU_phy.h	/^}__attribute__ ((packed)) SwChnlCmd;$/;"	t	typeref:struct:_SwChnlCmd
SwChnlCmdID	r819xU_phy.h	/^}SwChnlCmdID;$/;"	t	typeref:enum:_SwChnlCmdID
SwChnlInProgress	r8192U.h	/^	u8	SwChnlInProgress;$/;"	m	struct:r8192_priv
SwChnlStage	r8192U.h	/^	u8 	SwChnlStage;$/;"	m	struct:r8192_priv
SwChnlStep	r8192U.h	/^	u8	SwChnlStep;$/;"	m	struct:r8192_priv
SwChnlWorkItem	r8192U.h	/^	struct work_struct SwChnlWorkItem;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
TCR	r8192U_hw.h	/^	TCR			= 0x040, \/\/ Transmit Configuration Register$/;"	e	enum:_RTL8192Usb_HW
TCR_LRL_OFFSET	r8192U_hw.h	135;"	d
TCR_MXDMA_2048	r8192U_hw.h	134;"	d
TCR_MXDMA_OFFSET	r8192U_hw.h	137;"	d
TCR_SAT	r8192U_hw.h	138;"	d
TCR_SRL_OFFSET	r8192U_hw.h	136;"	d
TID	r819xU_cmdpkt.h	/^	u8	TID:4;				\/* *\/	$/;"	m	struct:tag_cmd_pkt_tx_feedback
TOTAL_CAM_ENTRY	r8192U_core.c	6206;"	d	file:
TPPoll	r8192U_hw.h	/^	TPPoll			= 0x0fd, \/\/ Transmit priority polling register$/;"	e	enum:_RTL8192Usb_HW
TRUE	r8192U.h	49;"	d
TSFL	r8192U.h	/^	u32                  TSFL;$/;"	m	struct:rx_drvinfo_819x_usb
TSFR	r8192U_hw.h	/^	TSFR			= 0x308,	$/;"	e	enum:_RTL8192Usb_HW
TS_ACTION	ieee80211.h	/^} TS_ACTION, *PTS_ACTION;$/;"	t	typeref:enum:_TS_ACTION
TS_not_created	ieee80211.h	/^	TS_not_created	= 0x2F, \/\/ 47$/;"	e	enum:_ReasonCode
TXCMD_QUEUE	ieee80211.h	70;"	d
TX_PACKET_DRVAGGR_SUBFRAME_SHIFT_BYTES	r8192U.h	434;"	d
TX_PACKET_SHIFT_BYTES	r8192U.h	430;"	d
TX_POWER_NEAR_FIELD_THRESH_HIGH	r8192U_dm.h	53;"	d
TX_POWER_NEAR_FIELD_THRESH_LOW	r8192U_dm.h	54;"	d
TX_SET_CONFIG	r819xU_cmdpkt.h	/^    TX_SET_CONFIG				= 2,$/;"	e	enum:tag_command_packet_directories
ThermalMeter	r8192U.h	/^	u8	ThermalMeter[2];				\/\/ ThermalMeter, index 0 for RFIC0, and 1 for RFIC1$/;"	m	struct:r8192_priv
TimeStampHigh	ieee80211.h	/^	u32       TimeStampHigh;$/;"	m	struct:ieee80211_rx_stats
TimeStampLow	ieee80211.h	/^	u32       TimeStampLow;$/;"	m	struct:ieee80211_rx_stats
TotalNum	r8192U.h	/^	u32     TotalNum;               \/\/num of valid elements$/;"	m	struct:_RT_SMOOTH_DATA_4RF
TotalVal	r8192U.h	/^	u32     TotalVal[4];            \/\/sum of valid elements$/;"	m	struct:_RT_SMOOTH_DATA_4RF
TranslateRxSignalStuff819xUsb	r8192U_core.c	/^void TranslateRxSignalStuff819xUsb(struct sk_buff *skb, $/;"	f
TransmitConfig	r8192U.h	/^	u32	TransmitConfig;$/;"	m	struct:r8192_priv
Turbo_Enable	ieee80211.h	/^	u8 Turbo_Enable;\/\/enable turbo mode, added by thomas$/;"	m	struct:ieee80211_network
TxAGCOffSet	r8192U.h	/^        u32		TxAGCOffSet:4;$/;"	m	struct:_tx_fwinfo_819x_usb
TxAGCSign	r8192U.h	/^        u32		TxAGCSign:1;$/;"	m	struct:_tx_fwinfo_819x_usb
TxBBGainTableLength	r8192U.h	799;"	d
TxBFCap	r819xU_HTType.h	/^	u8	TxBFCap[4];$/;"	m	struct:_HT_CAPABILITY_ELE
TxBandwidth	r8192U.h	/^        u8		TxBandwidth:1;          \/\/ This is used for HT MCS rate only.$/;"	m	struct:_tx_fwinfo_819x_usb
TxBufferSize	r8192U.h	/^	u16 	TxBufferSize;$/;"	m	struct:_tx_desc_cmd_819x_usb
TxBufferSize	r8192U.h	/^        u16	TxBufferSize;$/;"	m	struct:_tx_desc_819x_usb
TxFWInfoSize	r8192U.h	/^	u8	TxFWInfoSize;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
TxFWInfoSize	r8192U.h	/^	u8	TxFWInfoSize;$/;"	m	struct:_tx_desc_cmd_819x_usb
TxFWInfoSize	r8192U.h	/^        u8	TxFWInfoSize;$/;"	m	struct:_tx_desc_819x_usb
TxHT	r8192U.h	/^        u8		TxHT:1;$/;"	m	struct:_tx_fwinfo_819x_usb
TxPerPktInfoFeedback	r8192U.h	/^        u32		TxPerPktInfoFeedback:1;\/\/1 indicate Tx info gathtered by firmware and returned by Rx Cmd$/;"	m	struct:_tx_fwinfo_819x_usb
TxPowerDiff	r8192U.h	/^	u8	TxPowerDiff;$/;"	m	struct:r8192_priv
TxPowerLevelCCK	r8192U.h	/^	u8	TxPowerLevelCCK[14];			\/\/ CCK channel 1~14$/;"	m	struct:r8192_priv
TxPowerLevelOFDM24G	r8192U.h	/^	u8	TxPowerLevelOFDM24G[14];		\/\/ OFDM 2.4G channel 1~14$/;"	m	struct:r8192_priv
TxPowerLevelOFDM5G	r8192U.h	/^	u8	TxPowerLevelOFDM5G[14];			\/\/ OFDM 5G$/;"	m	struct:r8192_priv
TxRate	r8192U.h	/^        u8		TxRate:7;$/;"	m	struct:_tx_fwinfo_819x_usb
TxSTBC	r819xU_HTType.h	/^	u8	TxSTBC:1;$/;"	m	struct:_HT_CAPABILITY_ELE
TxSubCarrier	r8192U.h	/^        u8		TxSubCarrier:2;         \/\/ This is used for legacy OFDM rate only.$/;"	m	struct:_tx_fwinfo_819x_usb
TxTsRecord	ieee80211.h	/^	TX_TS_RECORD		TxTsRecord[TOTAL_TS_NUM];$/;"	m	struct:ieee80211_device
Tx_INFO_RSVD	r8192U.h	/^        u32		Tx_INFO_RSVD:6;$/;"	m	struct:_tx_fwinfo_819x_usb
Tx_Retry_Count_Reg	r8192U_dm.h	59;"	d
Tx_TS_Admit_List	ieee80211.h	/^	struct list_head		Tx_TS_Admit_List;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
Tx_TS_Pending_List	ieee80211.h	/^	struct list_head		Tx_TS_Pending_List;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
Tx_TS_Unused_List	ieee80211.h	/^	struct list_head		Tx_TS_Unused_List;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
UART_PRIORITY	r8192U.h	/^	UART_PRIORITY \/\/0x0F$/;"	e	enum:__anon15
UFWP	r8192U_hw.h	/^	UFWP			= 0x318,$/;"	e	enum:_RTL8192Usb_HW
UP2AC	ieee80211.h	1411;"	d
USB	r8192U.h	/^	enum card_type {PCI,MINIPCI,CARDBUS,USB\/*rtl8187*\/}card_type;$/;"	e	enum:r8192_priv::card_type
USB_HWDESC_HEADER_LEN	r8192U.h	429;"	d
USB_VENDOR_ID_NETGEAR	r8192U_core.c	107;"	d	file:
USB_VENDOR_ID_REALTEK	r8192U_core.c	104;"	d	file:
USERATE	r8192U.h	/^	u8	USERATE:1;$/;"	m	struct:_tx_desc_819x_usb_aggr_subframe
USERATE	r8192U.h	/^        u8	USERATE:1;$/;"	m	struct:_tx_desc_819x_usb
USE_8051_3WIRE	r8180_rtl8225.c	18;"	d	file:
USTIME	r8192U_hw.h	/^	USTIME			= 0x04e, \/\/ Microsecond Tuning Register, Sets the microsecond time unit used by MAC clock.$/;"	e	enum:_RTL8192Usb_HW
UpdateRxPktTimeStamp8190	r8192U_core.c	/^void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)$/;"	f
UsbRxFwAggrEn	r819xU_HTType.h	/^	u8				UsbRxFwAggrEn;$/;"	m	struct:_RT_HIGH_THROUGHPUT
UsbRxFwAggrPacketNum	r819xU_HTType.h	/^	u8				UsbRxFwAggrPacketNum;$/;"	m	struct:_RT_HIGH_THROUGHPUT
UsbRxFwAggrPageNum	r819xU_HTType.h	/^	u8				UsbRxFwAggrPageNum;$/;"	m	struct:_RT_HIGH_THROUGHPUT
UsbRxFwAggrTimeout	r819xU_HTType.h	/^	u8				UsbRxFwAggrTimeout;$/;"	m	struct:_RT_HIGH_THROUGHPUT
UsbTxAggrNum	r819xU_HTType.h	/^	u8				UsbTxAggrNum;$/;"	m	struct:_RT_HIGH_THROUGHPUT
UserPriority	ieee80211.h	/^	u8        UserPriority;$/;"	m	struct:ieee80211_rx_stats
VERSION_819xU	r8192U_hw.h	/^}VERSION_819xU,*PVERSION_819xU;$/;"	t	typeref:enum:_VERSION_819xU
VERSION_819xU_A	r8192U_hw.h	/^	VERSION_819xU_A, \/\/ A-cut$/;"	e	enum:_VERSION_819xU
VERSION_819xU_B	r8192U_hw.h	/^	VERSION_819xU_B, \/\/ B-cut$/;"	e	enum:_VERSION_819xU
VERSION_819xU_C	r8192U_hw.h	/^	VERSION_819xU_C,\/\/ C-cut$/;"	e	enum:_VERSION_819xU
VIAdmTime	r8192U_hw.h	/^	VIAdmTime		= 0x178, \/\/ VI Queue Admitted Time Register$/;"	e	enum:_RTL8192Usb_HW
VIQDA	r8192U_hw.h	/^	VIQDA			= 0x218, \/\/ VI Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
VI_PRIORITY	r8192U.h	/^	VI_PRIORITY, \/\/0x05$/;"	e	enum:__anon15
VI_QUEUE	ieee80211.h	67;"	d
VOAdmTime	r8192U_hw.h	/^	VOAdmTime		= 0x174, \/\/ VO Queue Admitted Time Register$/;"	e	enum:_RTL8192Usb_HW
VOQDA	r8192U_hw.h	/^	VOQDA			= 0x214, \/\/ VO Queue Descriptor Address$/;"	e	enum:_RTL8192Usb_HW
VO_PRIORITY	r8192U.h	/^	VO_PRIORITY,$/;"	e	enum:__anon15
VO_QUEUE	ieee80211.h	68;"	d
Value	r8192U_dm.h	/^	u32	Value;$/;"	m	struct:tag_Tx_Config_Cmd_Format
WARN	Makefile	/^WARN := -W$/;"	m
WCAMI	r8192U_hw.h	/^	WCAMI			= 0x0A4, \/\/ Software write CAM input content$/;"	e	enum:_RTL8192Usb_HW
WDCAPARA_ADD	r8192U_core.c	/^int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};$/;"	v
WEP_KEYS	ieee80211.h	937;"	d
WEP_KEY_LEN	ieee80211.h	938;"	d
WIRELESS_MODE	r8192U.h	/^} WIRELESS_MODE;$/;"	t	typeref:enum:_WIRELESS_MODE
WIRELESS_MODE_A	r8192U.h	/^	WIRELESS_MODE_A = 0x01,$/;"	e	enum:_WIRELESS_MODE
WIRELESS_MODE_AUTO	r8192U.h	/^	WIRELESS_MODE_AUTO = 0x08,$/;"	e	enum:_WIRELESS_MODE
WIRELESS_MODE_B	r8192U.h	/^	WIRELESS_MODE_B = 0x02,$/;"	e	enum:_WIRELESS_MODE
WIRELESS_MODE_G	r8192U.h	/^	WIRELESS_MODE_G = 0x04,$/;"	e	enum:_WIRELESS_MODE
WIRELESS_MODE_N_24G	r8192U.h	/^	WIRELESS_MODE_N_24G = 0x10,$/;"	e	enum:_WIRELESS_MODE
WIRELESS_MODE_N_5G	r8192U.h	/^	WIRELESS_MODE_N_5G = 0x20$/;"	e	enum:_WIRELESS_MODE
WIRELESS_MODE_UNKNOWN	r8192U.h	/^	WIRELESS_MODE_UNKNOWN = 0x00,$/;"	e	enum:_WIRELESS_MODE
WIRELESS_SPY	ieee80211.h	591;"	d
WLAN_AUTH_CHALLENGE_LEN	ieee80211.h	633;"	d
WLAN_AUTH_LEAP	ieee80211.h	631;"	d
WLAN_AUTH_OPEN	ieee80211.h	629;"	d
WLAN_AUTH_SHARED_KEY	ieee80211.h	630;"	d
WLAN_CAPABILITY_BSS	ieee80211.h	635;"	d
WLAN_CAPABILITY_CF_POLLABLE	ieee80211.h	637;"	d
WLAN_CAPABILITY_CF_POLL_REQUEST	ieee80211.h	638;"	d
WLAN_CAPABILITY_CHANNEL_AGILITY	ieee80211.h	642;"	d
WLAN_CAPABILITY_DSSS_OFDM	ieee80211.h	646;"	d
WLAN_CAPABILITY_IBSS	ieee80211.h	636;"	d
WLAN_CAPABILITY_PBCC	ieee80211.h	641;"	d
WLAN_CAPABILITY_PRIVACY	ieee80211.h	639;"	d
WLAN_CAPABILITY_QOS	ieee80211.h	644;"	d
WLAN_CAPABILITY_SHORT_PREAMBLE	ieee80211.h	640;"	d
WLAN_CAPABILITY_SHORT_SLOT	ieee80211.h	645;"	d
WLAN_CAPABILITY_SPECTRUM_MGMT	ieee80211.h	643;"	d
WLAN_ERP_BARKER_PREAMBLE	ieee80211.h	651;"	d
WLAN_ERP_NON_ERP_PRESENT	ieee80211.h	649;"	d
WLAN_ERP_USE_PROTECTION	ieee80211.h	650;"	d
WLAN_FC_GET_FRAMETYPE	ieee80211.h	624;"	d
WLAN_FC_GET_STYPE	ieee80211.h	622;"	d
WLAN_FC_GET_TYPE	ieee80211.h	621;"	d
WLAN_FC_GET_VERS	ieee80211.h	620;"	d
WLAN_GET_SEQ_FRAG	ieee80211.h	625;"	d
WLAN_GET_SEQ_SEQ	ieee80211.h	626;"	d
WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT	ieee80211.h	/^        WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_CIPHER_SUITE_REJECTED	ieee80211.h	/^        WLAN_REASON_CIPHER_SUITE_REJECTED = 24,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA	ieee80211.h	/^        WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA	ieee80211.h	/^        WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_DEAUTH_LEAVING	ieee80211.h	/^        WLAN_REASON_DEAUTH_LEAVING = 3,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_DISASSOC_AP_BUSY	ieee80211.h	/^        WLAN_REASON_DISASSOC_AP_BUSY = 5,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_DISASSOC_BAD_POWER	ieee80211.h	/^        WLAN_REASON_DISASSOC_BAD_POWER = 10,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_DISASSOC_BAD_SUPP_CHAN	ieee80211.h	/^        WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY	ieee80211.h	/^        WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_DISASSOC_STA_HAS_LEFT	ieee80211.h	/^        WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT	ieee80211.h	/^        WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_IEEE8021X_FAILED	ieee80211.h	/^        WLAN_REASON_IEEE8021X_FAILED = 23,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_IE_DIFFERENT	ieee80211.h	/^        WLAN_REASON_IE_DIFFERENT = 17,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_INVALID_AKMP	ieee80211.h	/^        WLAN_REASON_INVALID_AKMP = 20,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_INVALID_GROUP_CIPHER	ieee80211.h	/^        WLAN_REASON_INVALID_GROUP_CIPHER = 18,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_INVALID_IE	ieee80211.h	/^        WLAN_REASON_INVALID_IE = 13,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_INVALID_PAIRWISE_CIPHER	ieee80211.h	/^        WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_INVALID_RSN_IE_CAP	ieee80211.h	/^        WLAN_REASON_INVALID_RSN_IE_CAP = 22,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_MIC_FAILURE	ieee80211.h	/^        WLAN_REASON_MIC_FAILURE = 14,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_PREV_AUTH_NOT_VALID	ieee80211.h	/^        WLAN_REASON_PREV_AUTH_NOT_VALID = 2,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH	ieee80211.h	/^        WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_UNSPECIFIED	ieee80211.h	/^        WLAN_REASON_UNSPECIFIED = 1,$/;"	e	enum:ieee80211_reasoncode
WLAN_REASON_UNSUPP_RSN_VERSION	ieee80211.h	/^        WLAN_REASON_UNSUPP_RSN_VERSION = 21,$/;"	e	enum:ieee80211_reasoncode
WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA	ieee80211.h	/^        WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_NOAGILITY	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_NOPBCC	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_RATES	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_RATES = 18,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_DENIED_UNSPEC	ieee80211.h	/^        WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_REJECTED_BAD_POWER	ieee80211.h	/^        WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN	ieee80211.h	/^        WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_AUTH_TIMEOUT	ieee80211.h	/^        WLAN_STATUS_AUTH_TIMEOUT = 16,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_CAPS_UNSUPPORTED	ieee80211.h	/^        WLAN_STATUS_CAPS_UNSUPPORTED = 10,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_CHALLENGE_FAIL	ieee80211.h	/^        WLAN_STATUS_CHALLENGE_FAIL = 15,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_CIPHER_SUITE_REJECTED	ieee80211.h	/^        WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_INVALID_AKMP	ieee80211.h	/^        WLAN_STATUS_INVALID_AKMP = 43,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_INVALID_GROUP_CIPHER	ieee80211.h	/^        WLAN_STATUS_INVALID_GROUP_CIPHER = 41,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_INVALID_IE	ieee80211.h	/^        WLAN_STATUS_INVALID_IE = 40,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_INVALID_PAIRWISE_CIPHER	ieee80211.h	/^        WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_INVALID_RSN_IE_CAP	ieee80211.h	/^        WLAN_STATUS_INVALID_RSN_IE_CAP = 45,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG	ieee80211.h	/^        WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_REASSOC_NO_ASSOC	ieee80211.h	/^        WLAN_STATUS_REASSOC_NO_ASSOC = 11,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_SUCCESS	ieee80211.h	/^        WLAN_STATUS_SUCCESS = 0,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION	ieee80211.h	/^        WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_UNSPECIFIED_FAILURE	ieee80211.h	/^        WLAN_STATUS_UNSPECIFIED_FAILURE = 1,$/;"	e	enum:ieee80211_statuscode
WLAN_STATUS_UNSUPP_RSN_VERSION	ieee80211.h	/^        WLAN_STATUS_UNSUPP_RSN_VERSION = 44,$/;"	e	enum:ieee80211_statuscode
WME_ACI_MASK	ieee80211.h	1402;"	d
WME_AC_BE	ieee80211.h	1399;"	d
WME_AC_BK	ieee80211.h	1398;"	d
WME_AC_PRAM_LEN	ieee80211.h	1404;"	d
WME_AC_VI	ieee80211.h	1400;"	d
WME_AC_VO	ieee80211.h	1401;"	d
WME_AIFSN_MASK	ieee80211.h	1403;"	d
WMM_Hang_8187	ieee80211.h	1395;"	d
WMM_all_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon8
WMM_four_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon8
WMM_six_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon8
WMM_two_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon8
Wakeup	ieee80211.h	/^	u16       Wakeup:1;       \/\/for rtl8185$/;"	m	struct:ieee80211_rx_stats
ZEBRA2_CCK_OFDM_GAIN_SETTING	r8180_rtl8225z2.c	/^u8 ZEBRA2_CCK_OFDM_GAIN_SETTING[]={$/;"	v
ZEBRA_AGC	r8180_rtl8225z2.c	/^static u8  ZEBRA_AGC[]={$/;"	v	file:
ZEBRA_Config_87BASIC	r8180_rtl8225z2.c	/^void ZEBRA_Config_87BASIC(struct net_device *dev)$/;"	f
ZEBRA_Config_87BASIC_HardCode	r8180_rtl8225z2.c	/^void ZEBRA_Config_87BASIC_HardCode(struct net_device* dev)$/;"	f
ZEBRA_RF_RX_GAIN_TABLE	r8180_rtl8225z2.c	/^static u32 ZEBRA_RF_RX_GAIN_TABLE[]={	$/;"	v	file:
_ACT_CATEGORY	ieee80211.h	/^typedef enum _ACT_CATEGORY{$/;"	g
_BA_ACTION	ieee80211.h	/^typedef enum _BA_ACTION{$/;"	g
_BB_REGISTER_DEFINITION	r8192U.h	/^typedef struct _BB_REGISTER_DEFINITION{$/;"	s
_BSS_HT	r819xU_HTType.h	/^typedef struct _BSS_HT{$/;"	s
_BaseBand_Config_Type	r8192U_hw.h	/^typedef enum _BaseBand_Config_Type{$/;"	g
_CHNLOP	r819xU_HTType.h	/^typedef enum _CHNLOP{$/;"	g
_Dynamic_Rx_Path_Selection_	r8192U_dm.h	/^typedef struct _Dynamic_Rx_Path_Selection_$/;"	s
_FALSE_ALARM_STATISTICS	r819xU_HTType.h	/^typedef struct _FALSE_ALARM_STATISTICS{$/;"	s
_Fsync_State	ieee80211.h	/^typedef enum _Fsync_State{$/;"	g
_HT_ACTION	r819xU_HTType.h	/^typedef enum _HT_ACTION{$/;"	g
_HT_AGGRE_MODE_E	r819xU_HTType.h	/^typedef enum _HT_AGGRE_MODE_E{$/;"	g
_HT_Bandwidth_40MHZ_Sub_Carrier	r819xU_HTType.h	/^typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier{$/;"	g
_HT_CAPABILITY_ELE	r819xU_HTType.h	/^typedef	struct _HT_CAPABILITY_ELE{$/;"	s
_HT_CHANNEL_WIDTH	r819xU_HTType.h	/^typedef enum _HT_CHANNEL_WIDTH{$/;"	g
_HT_EXTCHNL_OFFSET	r819xU_HTType.h	/^typedef enum _HT_EXTCHNL_OFFSET{$/;"	g
_HT_INFORMATION_ELE	r819xU_HTType.h	/^typedef struct _HT_INFORMATION_ELE{$/;"	s
_HT_IOT_ACTION	r819xU_HTGen.h	/^typedef enum _HT_IOT_ACTION{$/;"	g
_HT_MCS_RATE	r819xU_HTType.h	/^typedef enum _HT_MCS_RATE{$/;"	g
_HT_SPEC_VER	r819xU_HTType.h	/^typedef enum _HT_SPEC_VER{$/;"	g
_HW90_BLOCK	r819xU_phy.h	/^typedef enum _HW90_BLOCK{$/;"	g
_LED_STRATEGY_8190	r8192U.h	/^typedef	enum _LED_STRATEGY_8190{$/;"	g
_MIMOPS_CTRL	r819xU_HTType.h	/^typedef struct _MIMOPS_CTRL{$/;"	s
_MIMO_EVM	r819xU_HTType.h	/^typedef struct _MIMO_EVM{$/;"	s
_MIMO_RSSI	r819xU_HTType.h	/^typedef struct _MIMO_RSSI{$/;"	s
_R819XU_HTTYPE_H_	r819xU_HTType.h	2;"	d
_R819XU_PHYREG_H	r819xU_phyreg.h	2;"	d
_R819XU_PHY_H	r819xU_phy.h	2;"	d
_RF90_RADIO_PATH	r819xU_phy.h	/^typedef enum _RF90_RADIO_PATH{$/;"	g
_RTL8192Usb_HW	r8192U_hw.h	/^enum _RTL8192Usb_HW {$/;"	g
_RT_CUSTOMER_ID	r8192U.h	/^typedef enum _RT_CUSTOMER_ID$/;"	g
_RT_HIGH_THROUGHPUT	r819xU_HTType.h	/^typedef struct _RT_HIGH_THROUGHPUT{$/;"	s
_RT_HTINFO_STA_ENTRY	r819xU_HTType.h	/^typedef struct _RT_HTINFO_STA_ENTRY{$/;"	s
_RT_RF_POWER_STATE	r8192U.h	/^typedef enum _RT_RF_POWER_STATE$/;"	g
_RT_RF_TYPE_819xU	r8192U.h	/^typedef enum _RT_RF_TYPE_819xU{$/;"	g
_RT_RF_TYPE_DEF	r8192U_hw.h	/^typedef enum _RT_RF_TYPE_DEF$/;"	g
_RT_SMOOTH_DATA_4RF	r8192U.h	/^typedef struct _RT_SMOOTH_DATA_4RF {$/;"	s
_RX_REORDER_ENTRY	ieee80211.h	/^typedef struct _RX_REORDER_ENTRY$/;"	s
_ReasonCode	ieee80211.h	/^enum	_ReasonCode{$/;"	g
_SwChnlCmd	r819xU_phy.h	/^typedef struct _SwChnlCmd{$/;"	s
_SwChnlCmdID	r819xU_phy.h	/^typedef enum _SwChnlCmdID{$/;"	g
_TS_ACTION	ieee80211.h	/^typedef enum _TS_ACTION{$/;"	g
_VERSION_819xU	r8192U_hw.h	/^typedef enum _VERSION_819xU{$/;"	g
_WIRELESS_MODE	r8192U.h	/^typedef enum _WIRELESS_MODE {$/;"	g
__INC_FIRMWARE_H	r819xU_firmware.h	2;"	d
__INC_R819XU_FIRMWARE_IMG_H	r819xU_firmware_img.h	2;"	d
__R8192UDM_H__	r8192U_dm.h	21;"	d
__adddf3	r8192U_core.c	/^double __adddf3(double a, double b) { return a+b; }$/;"	f
__addsf3	r8192U_core.c	/^double __addsf3(float a, float b) { return a+b; }$/;"	f
__attribute_used__	r8192_usb.mod.c	/^__attribute_used__$/;"	v	file:
__attribute_used__	r8192_usb.mod.c	/^__attribute_used__$/;"	v	typeref:struct:____versions	file:
__extendsfdf2	r8192U_core.c	/^double __extendsfdf2(float a) {return a;}$/;"	f
__fixunsdfsi	r8192U_core.c	/^unsigned int __fixunsdfsi (double d) { return d; }$/;"	f
__floatsidf	r8192U_core.c	/^double __floatsidf (int i) { return i; }$/;"	f
__subdf3	r8192U_core.c	/^double __subdf3(double a, double b) { return a-b; }$/;"	f
__this_module	r8192_usb.mod.c	/^struct module __this_module$/;"	v	typeref:struct:module
_bandwidth_autoswitch	ieee80211.h	/^typedef struct _bandwidth_autoswitch$/;"	s
_bss_ht	ieee80211.h	/^typedef struct _bss_ht{$/;"	s
_ccktxbbgain_struct	r8192U.h	/^typedef struct _ccktxbbgain_struct$/;"	s
_desc_packet_type_e	r8192U.h	/^typedef enum _desc_packet_type_e{$/;"	g
_dynamic_initial_gain_threshold_	r8192U_dm.h	/^typedef struct _dynamic_initial_gain_threshold_$/;"	s
_erp_t	ieee80211.h	/^typedef enum _erp_t{$/;"	g
_firmware_init_step	r819xU_firmware.h	/^typedef enum _firmware_init_step{$/;"	g
_firmware_source	r8192U.h	/^typedef enum _firmware_source{$/;"	g
_firmware_status	r8192U.h	/^typedef enum _firmware_status{$/;"	g
_frameqos	ieee80211.h	/^typedef union _frameqos {$/;"	u
_init_gain	r8192U.h	/^typedef struct _init_gain$/;"	s
_opt_rst_type	r819xU_firmware.h	/^typedef enum _opt_rst_type{$/;"	g
_phy_cck_rx_status_report_819xusb	r8192U.h	/^typedef struct _phy_cck_rx_status_report_819xusb$/;"	s
_phy_ofdm_rx_status_report_819xusb	r8192U.h	/^typedef struct _phy_ofdm_rx_status_report_819xusb$/;"	s
_phy_ofdm_rx_status_rxsc_sgien_exintfflag	r8192U.h	/^typedef struct _phy_ofdm_rx_status_rxsc_sgien_exintfflag{$/;"	s
_rate_adaptive	r8192U.h	/^typedef struct _rate_adaptive$/;"	s
_rt_9x_tx_rate_history	r8192U.h	/^typedef struct _rt_9x_tx_rate_history {$/;"	s
_rt_firmare_seg_container	r8192U.h	/^typedef struct _rt_firmare_seg_container {$/;"	s
_rt_firmware	r8192U.h	/^typedef struct _rt_firmware{$/;"	s
_rt_firmware_info_819xUsb	r8192U.h	/^typedef struct _rt_firmware_info_819xUsb{$/;"	s
_rt_status	r819xU_cmdpkt.c	/^typedef enum _rt_status{$/;"	g	file:
_rtl8192_up	r8192U_core.c	/^int _rtl8192_up(struct net_device *dev)$/;"	f
_rtl819xUsb_loopback	r8192U.h	/^typedef enum _rtl819xUsb_loopback{$/;"	g
_rx_desc_819x_usb_aggr_subframe	r8192U.h	/^typedef struct _rx_desc_819x_usb_aggr_subframe{$/;"	s
_tx_desc_819x_usb	r8192U.h	/^typedef struct _tx_desc_819x_usb {$/;"	s
_tx_desc_819x_usb_aggr_subframe	r8192U.h	/^typedef struct _tx_desc_819x_usb_aggr_subframe {$/;"	s
_tx_desc_cmd_819x_usb	r8192U.h	/^typedef struct _tx_desc_cmd_819x_usb {$/;"	s
_tx_fwinfo_819x_usb	r8192U.h	/^typedef struct _tx_fwinfo_819x_usb {$/;"	s
_txbbgain_struct	r8192U.h	/^typedef struct _txbbgain_struct$/;"	s
aSifsTime	ieee80211.h	217;"	d
abg_true	ieee80211.h	/^	int abg_true;   \/* ABG flag              *\/$/;"	m	struct:ieee80211_device
ac_aci_acm_aifsn	ieee80211.h	/^	u8 ac_aci_acm_aifsn;$/;"	m	struct:ieee80211_wmm_ac_param
ac_dir_tid	ieee80211.h	/^	u8 ac_dir_tid;$/;"	m	struct:ieee80211_wmm_ts_info
ac_ecwmin_ecwmax	ieee80211.h	/^	u8 ac_ecwmin_ecwmax;$/;"	m	struct:ieee80211_wmm_ac_param
ac_info	ieee80211.h	/^        u8 ac_info;$/;"	m	struct:ieee80211_qos_information_element
ac_params_record	ieee80211.h	/^        struct ieee80211_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];$/;"	m	struct:ieee80211_qos_parameter_info	typeref:struct:ieee80211_qos_parameter_info::ieee80211_qos_ac_parameter
ac_txop_limit	ieee80211.h	/^	u16 ac_txop_limit;$/;"	m	struct:ieee80211_wmm_ac_param
ac_up_psb	ieee80211.h	/^	u8 ac_up_psb;$/;"	m	struct:ieee80211_wmm_ts_info
aci_aifsn	ieee80211.h	/^        u8 aci_aifsn;$/;"	m	struct:ieee80211_qos_ac_parameter
ack_policy	ieee80211.h	/^		u16 ack_policy:2;$/;"	m	struct:_frameqos::__anon7
active	ieee80211.h	/^        int active;$/;"	m	struct:ieee80211_qos_data
active_key	ieee80211.h	/^	u16 active_key:2,$/;"	m	struct:ieee80211_security
active_scan	ieee80211.h	/^	short active_scan;$/;"	m	struct:ieee80211_device
adc_pwdb_X	r8192U.h	/^	u8	adc_pwdb_X[4];$/;"	m	struct:_phy_cck_rx_status_report_819xusb
addr	r8192U.h	/^                unsigned char addr;$/;"	m	struct:rtl_reg_debug::__anon14
addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr
addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addrqos
addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addr
addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addrqos
addr1	ieee80211.h	/^        u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_1addr
addr1	ieee80211.h	/^        u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_2addr
addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr
addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addrqos
addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addr
addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addrqos
addr2	ieee80211.h	/^        u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_2addr
addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr
addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addrqos
addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addr
addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addrqos
addr4	ieee80211.h	/^	u8 addr4[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addr
addr4	ieee80211.h	/^	u8 addr4[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_4addrqos
aggregation	ieee80211.h	/^	bool				aggregation;$/;"	m	struct:_bss_ht
aggregation	ieee80211.h	/^	bool aggregation;$/;"	m	struct:ieee80211_device
aid	ieee80211.h	/^	__le16 aid;$/;"	m	struct:ieee80211_assoc_response_frame
aifs	ieee80211.h	/^        u8 aifs[QOS_QUEUE_NUM];$/;"	m	struct:ieee80211_qos_parameters
alg	ieee80211.h	/^			u8 alg[IEEE_CRYPT_ALG_NAME_LEN];$/;"	m	struct:ieee_param::__anon2::__anon6
alg	r8192U.h	/^			u8 alg[16];$/;"	m	struct:ipw_param::__anon9::__anon13
algorithm	ieee80211.h	/^	__le16 algorithm;$/;"	m	struct:ieee80211_authentication
alloc_ieee80211	ieee80211.h	275;"	d
alloc_tx_beacon_desc_ring	r8192U_core.c	/^int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)$/;"	f
ampdu_density	ieee80211.h	/^        u8 ampdu_density;$/;"	m	struct:cb_desc
ampdu_factor	ieee80211.h	/^        u8 ampdu_factor;$/;"	m	struct:cb_desc
ap_mac_addr	ieee80211.h	/^	u8 ap_mac_addr[6];$/;"	m	struct:ieee80211_device
ap_overload	ieee80211.h	/^	ap_overload 	= 0x5, $/;"	e	enum:_ReasonCode
asoc_not_auth	ieee80211.h	/^	asoc_not_auth	= 0x9,$/;"	e	enum:_ReasonCode
assert	r8192U.h	145;"	d
assert	r8192U.h	167;"	d
assoc_id	ieee80211.h	/^	u16 assoc_id;$/;"	m	struct:ieee80211_device
associate_complete_wq	ieee80211.h	/^	struct tq_struct associate_complete_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
associate_complete_wq	ieee80211.h	/^        struct work_struct associate_complete_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
associate_procedure_wq	ieee80211.h	/^	struct tq_struct associate_procedure_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
associate_procedure_wq	ieee80211.h	/^        struct work_struct associate_procedure_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
associate_retry_wq	ieee80211.h	/^	struct tq_struct associate_retry_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
associate_retry_wq	ieee80211.h	/^        struct delayed_work associate_retry_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
associate_retry_wq	ieee80211.h	/^        struct work_struct associate_retry_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
associate_seq	ieee80211.h	/^	u16 associate_seq;$/;"	m	struct:ieee80211_device
associate_timer	ieee80211.h	/^	struct timer_list associate_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
atim_window	ieee80211.h	/^	u16 atim_window;$/;"	m	struct:ieee80211_network
atm_chnlop	ieee80211.h	/^	atomic_t	atm_chnlop;$/;"	m	struct:ieee80211_device
atm_swbw	ieee80211.h	/^	atomic_t	atm_swbw;$/;"	m	struct:ieee80211_device
auth_802_1x_fail	ieee80211.h	/^	auth_802_1x_fail= 0x17,$/;"	e	enum:_ReasonCode
auth_algo	ieee80211.h	/^            auth_algo:4,$/;"	m	struct:ieee80211_security
auth_mode	ieee80211.h	/^	    auth_mode:2,$/;"	m	struct:ieee80211_security
auth_not_valid	ieee80211.h	/^	auth_not_valid	= 0x2,$/;"	e	enum:_ReasonCode
b2GPAPEPolarity	r819xU_phyreg.h	306;"	d
b3WireAddressLength	r819xU_phyreg.h	302;"	d
b3WireDataLength	r819xU_phyreg.h	301;"	d
b3WireRFPowerDown	r819xU_phyreg.h	303;"	d
b40MDClkPowerUP	r819xU_phyreg.h	355;"	d
b5GPAPEPolarity	r819xU_phyreg.h	305;"	d
b80MClkDelay	r819xU_phyreg.h	359;"	d
bAD11InputRange	r819xU_phyreg.h	366;"	d
bAD11OPCurrent	r819xU_phyreg.h	367;"	d
bAD11PowerUpAtRx	r819xU_phyreg.h	382;"	d
bAD11PowerUpAtTx	r819xU_phyreg.h	380;"	d
bAD11SHGain	r819xU_phyreg.h	365;"	d
bAD7Current	r819xU_phyreg.h	378;"	d
bAD7Gain	r819xU_phyreg.h	375;"	d
bAD7InputCMMode	r819xU_phyreg.h	377;"	d
bAD7InputRange	r819xU_phyreg.h	374;"	d
bAD7OutputCMMode	r819xU_phyreg.h	376;"	d
bAD7PowerUp	r819xU_phyreg.h	352;"	d
bADCBackoff	r819xU_phyreg.h	505;"	d
bADClkPhase	r819xU_phyreg.h	358;"	d
bAFELoopback	r819xU_phyreg.h	370;"	d
bAFEWatchDogEnable	r819xU_phyreg.h	360;"	d
bAGCAddress	r819xU_phyreg.h	295;"	d
bAGCRxCode	r819xU_phyreg.h	300;"	d
bAGCTxCode	r819xU_phyreg.h	299;"	d
bAMPDUEnable	ieee80211.h	/^        u8 bAMPDUEnable:1;$/;"	m	struct:cb_desc
bAMPDUEnable	r819xU_HTType.h	/^	u8				bAMPDUEnable;				\/\/ This indicate Tx A-MPDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
bAMSDU_Support	r819xU_HTType.h	/^	u8				bAMSDU_Support;			\/\/ This indicates Tx A-MSDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
bAdvTimeCtrl	r819xU_phyreg.h	749;"	d
bAdvUpdCFO	r819xU_phyreg.h	748;"	d
bAdvUpdEqz	r819xU_phyreg.h	757;"	d
bAntHT1	r819xU_phyreg.h	406;"	d
bAntHT1S1	r819xU_phyreg.h	408;"	d
bAntHT2	r819xU_phyreg.h	407;"	d
bAntL	r819xU_phyreg.h	404;"	d
bAntNonHT	r819xU_phyreg.h	405;"	d
bAntNonHTS1	r819xU_phyreg.h	409;"	d
bAntennaMapping	r819xU_phyreg.h	657;"	d
bBBCCKStart	r819xU_phyreg.h	285;"	d
bBBResetB	r819xU_phyreg.h	224;"	d
bBBStart	r819xU_phyreg.h	284;"	d
bBW_Search_L	r819xU_phyreg.h	524;"	d
bBW_TH	r819xU_phyreg.h	526;"	d
bBW_option	r819xU_phyreg.h	528;"	d
bBandSelect	r819xU_phyreg.h	323;"	d
bBandgapMbiasPowerUp	r819xU_phyreg.h	364;"	d
bBroadcast	ieee80211.h	/^	u8 bBroadcast:1;$/;"	m	struct:cb_desc
bBw40MHz	r819xU_HTType.h	/^	u8			bBw40MHz;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
bByte0	r819xU_phyreg.h	807;"	d
bByte1	r819xU_phyreg.h	808;"	d
bByte2	r819xU_phyreg.h	809;"	d
bByte3	r819xU_phyreg.h	810;"	d
bCCADropOption	r819xU_phyreg.h	564;"	d
bCCADropThres	r819xU_phyreg.h	565;"	d
bCCAMask	r819xU_phyreg.h	289;"	d
bCCKAntDiversity	r819xU_phyreg.h	417;"	d
bCCKAntennaPolarity	r819xU_phyreg.h	452;"	d
bCCKBBMode	r819xU_phyreg.h	412;"	d
bCCKBistMode	r819xU_phyreg.h	429;"	d
bCCKCCACount	r819xU_phyreg.h	427;"	d
bCCKCCAMask	r819xU_phyreg.h	430;"	d
bCCKCCAMode	r819xU_phyreg.h	436;"	d
bCCKCS_ratio	r819xU_phyreg.h	438;"	d
bCCKCarrierRecovery	r819xU_phyreg.h	418;"	d
bCCKChEstStart	r819xU_phyreg.h	426;"	d
bCCKCorgBit_sel	r819xU_phyreg.h	439;"	d
bCCKDACDebug	r819xU_phyreg.h	468;"	d
bCCKDCCancel	r819xU_phyreg.h	420;"	d
bCCKDebugPort	r819xU_phyreg.h	467;"	d
bCCKDefaultRxPath	r819xU_phyreg.h	489;"	d
bCCKEn	r819xU_phyreg.h	273;"	d
bCCKEqualizer	r819xU_phyreg.h	423;"	d
bCCKFACounterFreeze	r819xU_phyreg.h	486;"	d
bCCKFalseAlarmEnable	r819xU_phyreg.h	469;"	d
bCCKFalseAlarmRead	r819xU_phyreg.h	470;"	d
bCCKFalseCS_lim	r819xU_phyreg.h	437;"	d
bCCKFastFalseCCA	r819xU_phyreg.h	425;"	d
bCCKFixedRxAGC	r819xU_phyreg.h	450;"	d
bCCKISICancel	r819xU_phyreg.h	421;"	d
bCCKLNAPolarity	r819xU_phyreg.h	444;"	d
bCCKLengthExt	r819xU_phyreg.h	263;"	d
bCCKMatchFilter	r819xU_phyreg.h	422;"	d
bCCKNewCCA	r819xU_phyreg.h	441;"	d
bCCKOptionRxPath	r819xU_phyreg.h	490;"	d
bCCKPD_lim	r819xU_phyreg.h	440;"	d
bCCKPHY0_End	r819xU_phyreg.h	844;"	d
bCCKPreambleDetect	r819xU_phyreg.h	424;"	d
bCCKRFExtend	r819xU_phyreg.h	446;"	d
bCCKRx1stGain	r819xU_phyreg.h	445;"	d
bCCKRxADCPhase	r819xU_phyreg.h	432;"	d
bCCKRxAGCFormat	r819xU_phyreg.h	385;"	d
bCCKRxAGCReport	r819xU_phyreg.h	472;"	d
bCCKRxAGCReportType	r819xU_phyreg.h	454;"	d
bCCKRxAGCSatCount	r819xU_phyreg.h	448;"	d
bCCKRxAGCSatLevel	r819xU_phyreg.h	447;"	d
bCCKRxDAGCEn	r819xU_phyreg.h	455;"	d
bCCKRxDAGCPeriod	r819xU_phyreg.h	456;"	d
bCCKRxDAGCSatLevel	r819xU_phyreg.h	457;"	d
bCCKRxDCOffset	r819xU_phyreg.h	435;"	d
bCCKRxFACounterLower	r819xU_phyreg.h	480;"	d
bCCKRxFACounterUpper	r819xU_phyreg.h	481;"	d
bCCKRxFalseAlarmEnable	r819xU_phyreg.h	485;"	d
bCCKRxHPAGCFinal	r819xU_phyreg.h	483;"	d
bCCKRxHPAGCStart	r819xU_phyreg.h	482;"	d
bCCKRxHPofIG	r819xU_phyreg.h	442;"	d
bCCKRxIG	r819xU_phyreg.h	443;"	d
bCCKRxPhase	r819xU_phyreg.h	339;"	d
bCCKRxPowerSaving	r819xU_phyreg.h	414;"	d
bCCKRxRFSettle	r819xU_phyreg.h	449;"	d
bCCKRxReport_AntSel	r819xU_phyreg.h	473;"	d
bCCKRxReport_Lockedbit	r819xU_phyreg.h	477;"	d
bCCKRxReport_MFOff	r819xU_phyreg.h	474;"	d
bCCKRxReport_Pktloss	r819xU_phyreg.h	476;"	d
bCCKRxReport_RateError	r819xU_phyreg.h	478;"	d
bCCKRxReport_RxRate	r819xU_phyreg.h	479;"	d
bCCKRxRxReport_SQLoss	r819xU_phyreg.h	475;"	d
bCCKSampleRate	r819xU_phyreg.h	344;"	d
bCCKScramble	r819xU_phyreg.h	416;"	d
bCCKSideBand	r819xU_phyreg.h	415;"	d
bCCKTRSSI	r819xU_phyreg.h	471;"	d
bCCKTimingRecovery	r819xU_phyreg.h	458;"	d
bCCKTxC0	r819xU_phyreg.h	459;"	d
bCCKTxC1	r819xU_phyreg.h	460;"	d
bCCKTxC2	r819xU_phyreg.h	461;"	d
bCCKTxC3	r819xU_phyreg.h	462;"	d
bCCKTxC4	r819xU_phyreg.h	463;"	d
bCCKTxC5	r819xU_phyreg.h	464;"	d
bCCKTxC6	r819xU_phyreg.h	465;"	d
bCCKTxC7	r819xU_phyreg.h	466;"	d
bCCKTxCRC16	r819xU_phyreg.h	265;"	d
bCCKTxDACPhase	r819xU_phyreg.h	431;"	d
bCCKTxDCOffset	r819xU_phyreg.h	434;"	d
bCCKTxFilterType	r819xU_phyreg.h	453;"	d
bCCKTxLength	r819xU_phyreg.h	264;"	d
bCCKTxOn	r819xU_phyreg.h	400;"	d
bCCKTxPathSel	r819xU_phyreg.h	488;"	d
bCCKTxPowerSaving	r819xU_phyreg.h	413;"	d
bCCKTxPreamble	r819xU_phyreg.h	259;"	d
bCCKTxRate	r819xU_phyreg.h	419;"	d
bCCKTxSC	r819xU_phyreg.h	272;"	d
bCCKTxSFD	r819xU_phyreg.h	260;"	d
bCCKTxSIG	r819xU_phyreg.h	261;"	d
bCCKTxService	r819xU_phyreg.h	262;"	d
bCCKTxStart	r819xU_phyreg.h	227;"	d
bCCKTxStatus	r819xU_phyreg.h	266;"	d
bCCKcs_lim	r819xU_phyreg.h	428;"	d
bCCKr_cp_mode0	r819xU_phyreg.h	433;"	d
bCC_power_dB	r819xU_phyreg.h	693;"	d
bCFOAcc	r819xU_phyreg.h	547;"	d
bCFOAntSum	r819xU_phyreg.h	546;"	d
bCFOAntSumD	r819xU_phyreg.h	659;"	d
bCFOEn	r819xU_phyreg.h	672;"	d
bCFOLookBack	r819xU_phyreg.h	549;"	d
bCFOReportGet	r819xU_phyreg.h	661;"	d
bCFOStartOffset	r819xU_phyreg.h	548;"	d
bCFOSumWeight	r819xU_phyreg.h	550;"	d
bCFOValue	r819xU_phyreg.h	673;"	d
bCRC	ieee80211.h	/^	u16       bCRC:1;$/;"	m	struct:ieee80211_rx_stats
bCRC32Debug	r819xU_phyreg.h	228;"	d
bCSI1st	r819xU_phyreg.h	716;"	d
bCSI2nd	r819xU_phyreg.h	717;"	d
bCSIEstiMode	r819xU_phyreg.h	756;"	d
bCSIScheme	r819xU_phyreg.h	734;"	d
bCTSEnable	ieee80211.h	/^        u8 bCTSEnable:1;$/;"	m	struct:cb_desc
bCTSToSelfEnable	ieee80211.h	/^	bool bCTSToSelfEnable;$/;"	m	struct:ieee80211_device
bCckHighPower	r8192U.h	/^	u8	bCckHighPower;$/;"	m	struct:r8192_priv
bChSmooth	r819xU_phyreg.h	737;"	d
bChSmoothCfg1	r819xU_phyreg.h	738;"	d
bChSmoothCfg2	r819xU_phyreg.h	739;"	d
bChSmoothCfg3	r819xU_phyreg.h	740;"	d
bChSmoothCfg4	r819xU_phyreg.h	741;"	d
bCmdOrInit	ieee80211.h	/^	u8 bCmdOrInit:1;$/;"	m	struct:cb_desc
bComChCFO	r819xU_phyreg.h	755;"	d
bContTxHSSI	r819xU_phyreg.h	293;"	d
bContainHTC	ieee80211.h	/^	bool      bContainHTC;$/;"	m	struct:ieee80211_rx_stats
bCounterReset	r819xU_phyreg.h	249;"	d
bCounter_CCA	r819xU_phyreg.h	676;"	d
bCounter_CRC8Fail	r819xU_phyreg.h	679;"	d
bCounter_FastSync	r819xU_phyreg.h	681;"	d
bCounter_MCSNoSupport	r819xU_phyreg.h	680;"	d
bCounter_ParityFail	r819xU_phyreg.h	677;"	d
bCounter_RateIllegal	r819xU_phyreg.h	678;"	d
bCurBW40MHz	r819xU_HTType.h	/^	u8				bCurBW40MHz;				\/\/ Tx 40MHz channel capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurRxReorderEnable	r819xU_HTType.h	/^	u8				bCurRxReorderEnable;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurShortGI20MHz	r819xU_HTType.h	/^	u8				bCurShortGI20MHz;			\/\/ Tx Short GI for 20MHz$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurShortGI40MHz	r819xU_HTType.h	/^	u8				bCurShortGI40MHz;			\/\/ Tx Short GI for 40MHz$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurSuppCCK	r819xU_HTType.h	/^	u8				bCurSuppCCK;				\/\/ Tx CCK rate capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurTxBW40MHz	r819xU_HTType.h	/^	u8				bCurTxBW40MHz;	\/\/ If we use 40 MHz to Tx$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurrentAMPDUEnable	r819xU_HTType.h	/^	u8				bCurrentAMPDUEnable;		\/\/ This indicate Tx A-MPDU capability		$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurrentHTSupport	r819xU_HTType.h	/^	u8				bCurrentHTSupport;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurrentRT2RTAggregation	r819xU_HTType.h	/^	u8				bCurrentRT2RTAggregation;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurrentRT2RTLongSlotTime	r819xU_HTType.h	/^	u8				bCurrentRT2RTLongSlotTime;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bCurrentRxAggrEnable	r8192U.h	/^	bool bCurrentRxAggrEnable;$/;"	m	struct:r8192_priv
bCurrent_AMSDU_Support	r819xU_HTType.h	/^	u8				bCurrent_AMSDU_Support;	\/\/ This indicates Tx A-MSDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
bDA10PSAtRx	r819xU_phyreg.h	383;"	d
bDA10PSAtTx	r819xU_phyreg.h	381;"	d
bDA10PowerUp	r819xU_phyreg.h	351;"	d
bDA10Reverse	r819xU_phyreg.h	372;"	d
bDA10Swing	r819xU_phyreg.h	371;"	d
bDA6DebugMode	r819xU_phyreg.h	356;"	d
bDA6PowerUp	r819xU_phyreg.h	353;"	d
bDA6Swing	r819xU_phyreg.h	357;"	d
bDAClkSource	r819xU_phyreg.h	373;"	d
bDAFormat	r819xU_phyreg.h	644;"	d
bDAGCEnable	r819xU_phyreg.h	551;"	d
bDC_Slope_check	r819xU_phyreg.h	534;"	d
bDC_dc_Notch	r819xU_phyreg.h	516;"	d
bDFIRBackoff	r819xU_phyreg.h	506;"	d
bDFSCnt0	r819xU_phyreg.h	637;"	d
bDFSCnt1	r819xU_phyreg.h	638;"	d
bDFSFlag	r819xU_phyreg.h	639;"	d
bDPLLPowerUp	r819xU_phyreg.h	350;"	d
bDWord	r819xU_phyreg.h	813;"	d
bDebugItem	r819xU_phyreg.h	403;"	d
bDebugPage	r819xU_phyreg.h	402;"	d
bDisable	r819xU_phyreg.h	828;"	d
bDynamicTxHighPower	r8192U.h	/^	bool	bDynamicTxHighPower;  \/\/ Tx high power state$/;"	m	struct:r8192_priv
bDynamicTxLowPower	r8192U.h	/^	bool	bDynamicTxLowPower;  \/\/ Tx low power state$/;"	m	struct:r8192_priv
bEDCCA_H	r819xU_phyreg.h	566;"	d
bEDCCA_L	r819xU_phyreg.h	567;"	d
bED_TH2	r819xU_phyreg.h	527;"	d
bEnable	r819xU_phyreg.h	827;"	d
bEnableHT	r819xU_HTType.h	/^	u8				bEnableHT;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bEnableHT	r819xU_HTType.h	/^	u8			bEnableHT;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
bEncrypt	ieee80211.h	/^        u8 bEncrypt:1;$/;"	m	struct:cb_desc
bExtLNAGain	r819xU_phyreg.h	653;"	d
bExtSigClkEnable	r819xU_phyreg.h	363;"	d
bFC	r819xU_phyreg.h	751;"	d
bFGuard_Counter_DC_L	r819xU_phyreg.h	535;"	d
bFPGAPHY0_End	r819xU_phyreg.h	842;"	d
bFPGAPHY1_End	r819xU_phyreg.h	843;"	d
bFS_Option	r819xU_phyreg.h	533;"	d
bFirstMPDU	ieee80211.h	/^	bool      bFirstMPDU;$/;"	m	struct:ieee80211_rx_stats
bFirstSeg	ieee80211.h	/^        u8 bFirstSeg:1;$/;"	m	struct:cb_desc
bForcedShortGI	r819xU_HTType.h	/^	u8				bForcedShortGI;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bFrame_DC_Length	r819xU_phyreg.h	538;"	d
bFrame_GI2_TH	r819xU_phyreg.h	541;"	d
bFrame_TH	r819xU_phyreg.h	532;"	d
bFrame_TH_2	r819xU_phyreg.h	540;"	d
bFrame_Weight_Short	r819xU_phyreg.h	536;"	d
bGI2_Sync_en	r819xU_phyreg.h	542;"	d
bGI_TH	r819xU_phyreg.h	495;"	d
bGlobalResetB	r819xU_phyreg.h	225;"	d
bHSSI_R2TDelay	r819xU_phyreg.h	291;"	d
bHSSI_T2RDelay	r819xU_phyreg.h	292;"	d
bHTDetect	r819xU_phyreg.h	671;"	d
bHTSIG1_BandWidth	r819xU_phyreg.h	333;"	d
bHTSIG1_HTLength	r819xU_phyreg.h	334;"	d
bHTSIG1_MCS	r819xU_phyreg.h	332;"	d
bHTSIG2_AdvCoding	r819xU_phyreg.h	329;"	d
bHTSIG2_Aggreaton	r819xU_phyreg.h	327;"	d
bHTSIG2_CRC8	r819xU_phyreg.h	331;"	d
bHTSIG2_GI	r819xU_phyreg.h	324;"	d
bHTSIG2_NumOfHTLTF	r819xU_phyreg.h	330;"	d
bHTSIG2_STBC	r819xU_phyreg.h	328;"	d
bHTSIG2_Smoothing	r819xU_phyreg.h	325;"	d
bHTSIG2_Sounding	r819xU_phyreg.h	326;"	d
bHwError	ieee80211.h	/^	u16       bHwError:1;$/;"	m	struct:ieee80211_rx_stats
bHwRadioOff	r8192U.h	/^	 bool bHwRadioOff;$/;"	m	struct:r8192_priv
bHwSec	ieee80211.h	/^        u8 bHwSec:1; \/\/indicate whether use Hw security. WB$/;"	m	struct:cb_desc
bICV	ieee80211.h	/^	u16       bICV:1;$/;"	m	struct:ieee80211_rx_stats
bIGFromCCK	r819xU_phyreg.h	294;"	d
bIPathLoopback	r819xU_phyreg.h	368;"	d
bIQPathControl	r819xU_phyreg.h	389;"	d
bIfMF_Win_L	r819xU_phyreg.h	521;"	d
bIntDifClkEnable	r819xU_phyreg.h	362;"	d
bIntf_win_len_cfg	r819xU_phyreg.h	702;"	d
bIsAMPDU	ieee80211.h	/^	bool      bIsAMPDU;$/;"	m	struct:ieee80211_rx_stats
bIsCCK	ieee80211.h	/^	bool      bIsCCK;$/;"	m	struct:ieee80211_rx_stats
bIsPeerBcm	r819xU_HTType.h	/^	u8				bIsPeerBcm;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bIsQosData	ieee80211.h	/^	bool      bIsQosData;             \/\/ Added by Annie, 2005-12-22.$/;"	m	struct:ieee80211_rx_stats
bJapanMode	r819xU_phyreg.h	271;"	d
bLSIG_Length	r819xU_phyreg.h	337;"	d
bLSIG_Parity	r819xU_phyreg.h	338;"	d
bLSIG_Rate	r819xU_phyreg.h	335;"	d
bLSIG_Reserved	r819xU_phyreg.h	336;"	d
bLSSIReadAddress	r819xU_phyreg.h	340;"	d
bLSSIReadBackData	r819xU_phyreg.h	342;"	d
bLSSIReadEdge	r819xU_phyreg.h	341;"	d
bLSSIReadOKFlag	r819xU_phyreg.h	343;"	d
bLambda_ED	r819xU_phyreg.h	568;"	d
bLastDTPFlag_High	r8192U.h	/^	bool	bLastDTPFlag_High;$/;"	m	struct:r8192_priv
bLastDTPFlag_Low	r8192U.h	/^	bool	bLastDTPFlag_Low;$/;"	m	struct:r8192_priv
bLastIniPkt	ieee80211.h	/^	u8 bLastIniPkt:1;$/;"	m	struct:cb_desc
bLastSeg	ieee80211.h	/^        u8 bLastSeg:1;$/;"	m	struct:cb_desc
bLongCFO	r819xU_phyreg.h	685;"	d
bLongCFOFLength	r819xU_phyreg.h	687;"	d
bLongCFOTLength	r819xU_phyreg.h	686;"	d
bLoopFitType	r819xU_phyreg.h	745;"	d
bMFWeightSum	r819xU_phyreg.h	641;"	d
bMF_Win_L	r819xU_phyreg.h	523;"	d
bMRCMode	r819xU_phyreg.h	742;"	d
bMask12Bits	r819xU_phyreg.h	825;"	d
bMaskByte0	r819xU_phy.h	62;"	d
bMaskByte0	r819xU_phyreg.h	816;"	d
bMaskByte1	r819xU_phy.h	63;"	d
bMaskByte1	r819xU_phyreg.h	817;"	d
bMaskByte2	r819xU_phy.h	64;"	d
bMaskByte2	r819xU_phyreg.h	818;"	d
bMaskByte3	r819xU_phy.h	65;"	d
bMaskByte3	r819xU_phyreg.h	819;"	d
bMaskDWord	r819xU_phy.h	68;"	d
bMaskDWord	r819xU_phyreg.h	822;"	d
bMaskHWord	r819xU_phy.h	66;"	d
bMaskHWord	r819xU_phyreg.h	820;"	d
bMaskLWord	r819xU_phy.h	67;"	d
bMaskLWord	r819xU_phyreg.h	821;"	d
bMinIdxTH	r819xU_phyreg.h	642;"	d
bMulticast	ieee80211.h	/^	u8 bMulticast:1;$/;"	m	struct:cb_desc
bNB_Intf_TH_cfg	r819xU_phyreg.h	703;"	d
bNB_intf_det_on	r819xU_phyreg.h	701;"	d
bNoiseLvlTopSet	r819xU_phyreg.h	736;"	d
bNss	r819xU_phyreg.h	658;"	d
bNumOfCCKTx	r819xU_phyreg.h	251;"	d
bNumOfOFDMTx	r819xU_phyreg.h	250;"	d
bNumOfSTF	r819xU_phyreg.h	493;"	d
bOFDMContinueTx	r819xU_phyreg.h	662;"	d
bOFDMEn	r819xU_phyreg.h	274;"	d
bOFDMPHY0_End	r819xU_phyreg.h	845;"	d
bOFDMPHY1_End	r819xU_phyreg.h	846;"	d
bOFDMRxADCPhase	r819xU_phyreg.h	275;"	d
bOFDMService	r819xU_phyreg.h	253;"	d
bOFDMSingleCarrier	r819xU_phyreg.h	663;"	d
bOFDMSingleTone	r819xU_phyreg.h	664;"	d
bOFDMTxDACPhase	r819xU_phyreg.h	276;"	d
bOFDMTxLength	r819xU_phyreg.h	233;"	d
bOFDMTxOn	r819xU_phyreg.h	401;"	d
bOFDMTxParity	r819xU_phyreg.h	234;"	d
bOFDMTxRate	r819xU_phyreg.h	231;"	d
bOFDMTxReserved	r819xU_phyreg.h	232;"	d
bOFDMTxSC	r819xU_phyreg.h	399;"	d
bOFDMTxStart	r819xU_phyreg.h	226;"	d
bOFDMTxStatus	r819xU_phyreg.h	267;"	d
bPAEnd	r819xU_phyreg.h	286;"	d
bPAStart	r819xU_phyreg.h	281;"	d
bPD_Option	r819xU_phyreg.h	522;"	d
bPD_TH	r819xU_phyreg.h	518;"	d
bPD_TH_Opt2	r819xU_phyreg.h	519;"	d
bPHYCounterReset	r819xU_phyreg.h	660;"	d
bPLLPowerUp	r819xU_phyreg.h	349;"	d
bPMACControl	r819xU_phyreg.h	855;"	d
bPMACLoopback	r819xU_phyreg.h	229;"	d
bPMAC_End	r819xU_phyreg.h	841;"	d
bPSDAntennaPath	r819xU_phyreg.h	391;"	d
bPSDAverageNum	r819xU_phyreg.h	388;"	d
bPSDFFTSamplepPoint	r819xU_phyreg.h	387;"	d
bPSDFreq	r819xU_phyreg.h	390;"	d
bPSDIQSwitch	r819xU_phyreg.h	392;"	d
bPSDReport	r819xU_phyreg.h	396;"	d
bPSDRxTrigger	r819xU_phyreg.h	393;"	d
bPSDSineToneScale	r819xU_phyreg.h	395;"	d
bPSDTxTrigger	r819xU_phyreg.h	394;"	d
bPWDB	r819xU_phyreg.h	722;"	d
bPWED_TH	r819xU_phyreg.h	520;"	d
bPacketBW	ieee80211.h	/^        u8 bPacketBW:1;$/;"	m	struct:cb_desc
bPacketBeacon	ieee80211.h	/^	bool		  bPacketBeacon;	\/\/cosa add for rssi$/;"	m	struct:ieee80211_rx_stats
bPacketMatchBSSID	ieee80211.h	/^	bool      bPacketMatchBSSID;$/;"	m	struct:ieee80211_rx_stats
bPacketToSelf	ieee80211.h	/^	bool      bPacketToSelf;$/;"	m	struct:ieee80211_rx_stats
bPesudoNoiseState_A	r819xU_phyreg.h	778;"	d
bPesudoNoiseState_B	r819xU_phyreg.h	779;"	d
bPesudoNoiseState_C	r819xU_phyreg.h	780;"	d
bPesudoNoiseState_D	r819xU_phyreg.h	781;"	d
bPhCmpEnable	r819xU_phyreg.h	753;"	d
bPowerMeasFLength	r819xU_phyreg.h	696;"	d
bPowerMeasTLength	r819xU_phyreg.h	695;"	d
bPowerThres	r819xU_phyreg.h	584;"	d
bQPathLoopback	r819xU_phyreg.h	369;"	d
bR2RCCAMask	r819xU_phyreg.h	290;"	d
bRFEnd	r819xU_phyreg.h	288;"	d
bRFGain	r819xU_phyreg.h	705;"	d
bRFMOD	r819xU_phyreg.h	270;"	d
bRFSI_3Wire	r819xU_phyreg.h	315;"	d
bRFSI_3WireClock	r819xU_phyreg.h	312;"	d
bRFSI_3WireData	r819xU_phyreg.h	311;"	d
bRFSI_3WireLoad	r819xU_phyreg.h	313;"	d
bRFSI_3WireRW	r819xU_phyreg.h	314;"	d
bRFSI_ANTSW	r819xU_phyreg.h	319;"	d
bRFSI_ANTSWB	r819xU_phyreg.h	320;"	d
bRFSI_PAPE	r819xU_phyreg.h	321;"	d
bRFSI_PAPE5G	r819xU_phyreg.h	322;"	d
bRFSI_RFENV	r819xU_phyreg.h	316;"	d
bRFSI_TRSW	r819xU_phyreg.h	317;"	d
bRFSI_TRSWB	r819xU_phyreg.h	318;"	d
bRFSW_RxDefaultAnt	r819xU_phyreg.h	309;"	d
bRFSW_RxOptionAnt	r819xU_phyreg.h	310;"	d
bRFSW_TxDefaultAnt	r819xU_phyreg.h	307;"	d
bRFSW_TxOptionAnt	r819xU_phyreg.h	308;"	d
bRFStart	r819xU_phyreg.h	283;"	d
bRSSITableSelect	r819xU_phyreg.h	607;"	d
bRSSI_Gen	r819xU_phyreg.h	595;"	d
bRSSI_H	r819xU_phyreg.h	594;"	d
bRTL8256RegModeCtrl0	r819xU_phyreg.h	797;"	d
bRTL8256RegModeCtrl1	r819xU_phyreg.h	796;"	d
bRTL8256TxBBBW	r819xU_phyreg.h	869;"	d
bRTL8256TxBBOPBias	r819xU_phyreg.h	867;"	d
bRTL8256_RxLPFBW	r819xU_phyreg.h	799;"	d
bRTL8256_TxLPFBW	r819xU_phyreg.h	798;"	d
bRTL8258_RSSILPFBW	r819xU_phyreg.h	804;"	d
bRTL8258_RxLPFBW	r819xU_phyreg.h	803;"	d
bRTL8258_TxLPFBW	r819xU_phyreg.h	802;"	d
bRTSBW	ieee80211.h	/^        u8 bRTSBW:1;$/;"	m	struct:cb_desc
bRTSEnable	ieee80211.h	/^        u8 bRTSEnable:1;$/;"	m	struct:cb_desc
bRTSSTBC	ieee80211.h	/^        u8 bRTSSTBC:1;$/;"	m	struct:cb_desc
bRTSUseShortGI	ieee80211.h	/^	u8 bRTSUseShortGI:1;$/;"	m	struct:cb_desc
bRTSUseShortPreamble	ieee80211.h	/^	u8 bRTSUseShortPreamble:1;$/;"	m	struct:cb_desc
bRXIQImb_A	r819xU_phyreg.h	512;"	d
bRXIQImb_B	r819xU_phyreg.h	513;"	d
bRXIQImb_C	r819xU_phyreg.h	514;"	d
bRXIQImb_D	r819xU_phyreg.h	515;"	d
bRatio_TH	r819xU_phyreg.h	529;"	d
bRegBW40MHz	r819xU_HTType.h	/^	u8				bRegBW40MHz;				\/\/ Tx 40MHz channel capablity$/;"	m	struct:_RT_HIGH_THROUGHPUT
bRegRT2RTAggregation	r819xU_HTType.h	/^	u8				bRegRT2RTAggregation;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bRegRxReorderEnable	r819xU_HTType.h	/^	u8				bRegRxReorderEnable;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bRegShortGI20MHz	r819xU_HTType.h	/^	u8				bRegShortGI20MHz;			\/\/ Tx Short GI for 20MHz$/;"	m	struct:_RT_HIGH_THROUGHPUT
bRegShortGI40MHz	r819xU_HTType.h	/^	u8				bRegShortGI40MHz;			\/\/ Tx Short GI for 40Mhz$/;"	m	struct:_RT_HIGH_THROUGHPUT
bRegSuppCCK	r819xU_HTType.h	/^	u8				bRegSuppCCK;				\/\/ Tx CCK rate capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
bRegulator0Standby	r819xU_phyreg.h	346;"	d
bRegulator1Standby	r819xU_phyreg.h	348;"	d
bRegulatorAdjust	r819xU_phyreg.h	379;"	d
bRegulatorPLLStandby	r819xU_phyreg.h	347;"	d
bRxAGCAddressForLNA	r819xU_phyreg.h	571;"	d
bRxAGCEn	r819xU_phyreg.h	585;"	d
bRxAGCFreezeThres	r819xU_phyreg.h	573;"	d
bRxAGCFreezeThresMode	r819xU_phyreg.h	580;"	d
bRxAGCMin	r819xU_phyreg.h	587;"	d
bRxAGCShift	r819xU_phyreg.h	582;"	d
bRxAGCTogetherEn	r819xU_phyreg.h	586;"	d
bRxAntDivEn	r819xU_phyreg.h	570;"	d
bRxAntennaPowerShift	r819xU_phyreg.h	606;"	d
bRxDCNFType	r819xU_phyreg.h	511;"	d
bRxDFIRMode	r819xU_phyreg.h	510;"	d
bRxEVM1st	r819xU_phyreg.h	718;"	d
bRxEVM2nd	r819xU_phyreg.h	719;"	d
bRxFrame_Guard_Counter_L	r819xU_phyreg.h	633;"	d
bRxFreezeStep_AGC0	r819xU_phyreg.h	577;"	d
bRxFreezeStep_AGC1	r819xU_phyreg.h	574;"	d
bRxFreezeStep_AGC2	r819xU_phyreg.h	575;"	d
bRxFreezeStep_AGC3	r819xU_phyreg.h	576;"	d
bRxHPCCKIni	r819xU_phyreg.h	298;"	d
bRxHPT2R	r819xU_phyreg.h	297;"	d
bRxHPTx	r819xU_phyreg.h	296;"	d
bRxHP_BBP1	r819xU_phyreg.h	591;"	d
bRxHP_BBP2	r819xU_phyreg.h	592;"	d
bRxHP_BBP3	r819xU_phyreg.h	593;"	d
bRxHP_Final	r819xU_phyreg.h	608;"	d
bRxHP_Ini	r819xU_phyreg.h	588;"	d
bRxHP_RSSI	r819xU_phyreg.h	590;"	d
bRxHP_TRLNA	r819xU_phyreg.h	589;"	d
bRxHTAGCEn	r819xU_phyreg.h	619;"	d
bRxHTAGCFreezeThres	r819xU_phyreg.h	616;"	d
bRxHTAGCMin	r819xU_phyreg.h	618;"	d
bRxHTAGCTogetherEn	r819xU_phyreg.h	617;"	d
bRxHTDAGCEn	r819xU_phyreg.h	620;"	d
bRxHTRxHPEn	r819xU_phyreg.h	615;"	d
bRxHTRxHP_BBP	r819xU_phyreg.h	621;"	d
bRxHTRxHP_Final	r819xU_phyreg.h	622;"	d
bRxHTSettle_BBP	r819xU_phyreg.h	609;"	d
bRxHTSettle_BBPPW	r819xU_phyreg.h	612;"	d
bRxHTSettle_HSSI	r819xU_phyreg.h	610;"	d
bRxHTSettle_Idle	r819xU_phyreg.h	613;"	d
bRxHTSettle_Reserved	r819xU_phyreg.h	614;"	d
bRxHTSettle_RxHP	r819xU_phyreg.h	611;"	d
bRxHighPowerFlow	r819xU_phyreg.h	572;"	d
bRxIDCOffset	r819xU_phyreg.h	508;"	d
bRxInitialGain	r819xU_phyreg.h	569;"	d
bRxMFHold	r819xU_phyreg.h	625;"	d
bRxNBINotch	r819xU_phyreg.h	517;"	d
bRxOverFlowCheckType	r819xU_phyreg.h	581;"	d
bRxPD_DC_COUNT_MAX	r819xU_phyreg.h	628;"	d
bRxPD_Delay_TH	r819xU_phyreg.h	630;"	d
bRxPD_Delay_TH1	r819xU_phyreg.h	626;"	d
bRxPD_Delay_TH2	r819xU_phyreg.h	627;"	d
bRxPWRatioEn	r819xU_phyreg.h	624;"	d
bRxPWRatioTH	r819xU_phyreg.h	623;"	d
bRxPathA	r819xU_phyreg.h	496;"	d
bRxPathB	r819xU_phyreg.h	497;"	d
bRxPathC	r819xU_phyreg.h	498;"	d
bRxPathD	r819xU_phyreg.h	499;"	d
bRxPesudoNoiseOn	r819xU_phyreg.h	773;"	d
bRxPesudoNoise_A	r819xU_phyreg.h	774;"	d
bRxPesudoNoise_B	r819xU_phyreg.h	775;"	d
bRxPesudoNoise_C	r819xU_phyreg.h	776;"	d
bRxPesudoNoise_D	r819xU_phyreg.h	777;"	d
bRxProcessTime_BBPPW	r819xU_phyreg.h	605;"	d
bRxProcessTime_DAGC	r819xU_phyreg.h	603;"	d
bRxProcess_Delay	r819xU_phyreg.h	631;"	d
bRxQDCOffset	r819xU_phyreg.h	509;"	d
bRxQuickAGCEn	r819xU_phyreg.h	579;"	d
bRxRssi_Cmp_En	r819xU_phyreg.h	578;"	d
bRxSC	r819xU_phyreg.h	698;"	d
bRxSGI_Guard_L	r819xU_phyreg.h	634;"	d
bRxSGI_Search_L	r819xU_phyreg.h	635;"	d
bRxSGI_TH	r819xU_phyreg.h	636;"	d
bRxSNR_A	r819xU_phyreg.h	709;"	d
bRxSNR_B	r819xU_phyreg.h	710;"	d
bRxSNR_C	r819xU_phyreg.h	711;"	d
bRxSNR_D	r819xU_phyreg.h	712;"	d
bRxSearchrange_GI2_Early	r819xU_phyreg.h	632;"	d
bRxSettle_AntSW	r819xU_phyreg.h	602;"	d
bRxSettle_AntSW_RSSI	r819xU_phyreg.h	601;"	d
bRxSettle_BBP	r819xU_phyreg.h	599;"	d
bRxSettle_HSSI	r819xU_phyreg.h	604;"	d
bRxSettle_LNA	r819xU_phyreg.h	597;"	d
bRxSettle_RSSI	r819xU_phyreg.h	598;"	d
bRxSettle_RxHP	r819xU_phyreg.h	600;"	d
bRxSettle_TRSW	r819xU_phyreg.h	596;"	d
bRx_HT	r819xU_phyreg.h	699;"	d
bRx_HT_BW	r819xU_phyreg.h	697;"	d
bSBD_Option	r819xU_phyreg.h	531;"	d
bSBD_start_offset	r819xU_phyreg.h	539;"	d
bSFactorQAM1	r819xU_phyreg.h	725;"	d
bSFactorQAM2	r819xU_phyreg.h	726;"	d
bSFactorQAM3	r819xU_phyreg.h	727;"	d
bSFactorQAM4	r819xU_phyreg.h	728;"	d
bSFactorQAM5	r819xU_phyreg.h	729;"	d
bSFactorQAM6	r819xU_phyreg.h	730;"	d
bSFactorQAM7	r819xU_phyreg.h	731;"	d
bSFactorQAM8	r819xU_phyreg.h	732;"	d
bSFactorQAM9	r819xU_phyreg.h	733;"	d
bSGIEN	r819xU_phyreg.h	723;"	d
bSIGEVM	r819xU_phyreg.h	721;"	d
bSNREVMFLength	r819xU_phyreg.h	714;"	d
bSNREVMTLength	r819xU_phyreg.h	713;"	d
bSTBCEn	r819xU_phyreg.h	656;"	d
bSarch_GI2_Late	r819xU_phyreg.h	545;"	d
bSarch_Short_Early	r819xU_phyreg.h	543;"	d
bSarch_Short_Late	r819xU_phyreg.h	544;"	d
bShift	ieee80211.h	/^	bool      bShift;$/;"	m	struct:ieee80211_rx_stats
bShift_L	r819xU_phyreg.h	494;"	d
bShortCFO	r819xU_phyreg.h	682;"	d
bShortCFOFLength	r819xU_phyreg.h	684;"	d
bShortCFOTLength	r819xU_phyreg.h	683;"	d
bShortPreamble	ieee80211.h	/^	u16       bShortPreamble:1;$/;"	m	struct:ieee80211_rx_stats
bSigTone_Im	r819xU_phyreg.h	675;"	d
bSigTone_Re	r819xU_phyreg.h	674;"	d
bSub_Tune	r819xU_phyreg.h	537;"	d
bSupportCck	r819xU_HTType.h	/^	u8			bSupportCck;$/;"	m	struct:_RT_HTINFO_STA_ENTRY
bSwBwInProgress	r819xU_HTType.h	/^	u8				bSwBwInProgress;$/;"	m	struct:_RT_HIGH_THROUGHPUT
bTHEVMCfg	r819xU_phyreg.h	743;"	d
bTREnd	r819xU_phyreg.h	287;"	d
bTRSSIFreq	r819xU_phyreg.h	504;"	d
bTRSSILatchPhase	r819xU_phyreg.h	507;"	d
bTRSW	r819xU_phyreg.h	707;"	d
bTRSWIsolation_A	r819xU_phyreg.h	648;"	d
bTRSWIsolation_B	r819xU_phyreg.h	649;"	d
bTRSWIsolation_C	r819xU_phyreg.h	650;"	d
bTRSWIsolation_D	r819xU_phyreg.h	651;"	d
bTRSW_Tri_Only	r819xU_phyreg.h	583;"	d
bTRStart	r819xU_phyreg.h	282;"	d
bTXIQImb_A	r819xU_phyreg.h	552;"	d
bTXIQImb_B	r819xU_phyreg.h	553;"	d
bTXIQImb_C	r819xU_phyreg.h	554;"	d
bTXIQImb_D	r819xU_phyreg.h	555;"	d
bTableSel	r819xU_phyreg.h	706;"	d
bTailCFO	r819xU_phyreg.h	688;"	d
bTailCFOFLength	r819xU_phyreg.h	690;"	d
bTailCFOTLength	r819xU_phyreg.h	689;"	d
bToSelfBA	ieee80211.h	/^	bool		  bToSelfBA;		\/\/cosa add for rssi$/;"	m	struct:ieee80211_rx_stats
bTrackingMode	r819xU_phyreg.h	752;"	d
bTxAGCRate18_06	r819xU_phyreg.h	762;"	d
bTxAGCRate54_24	r819xU_phyreg.h	763;"	d
bTxAGCRateCCK	r819xU_phyreg.h	765;"	d
bTxAGCRateMCS11_MCS8	r819xU_phyreg.h	768;"	d
bTxAGCRateMCS15_MCS12	r819xU_phyreg.h	769;"	d
bTxAGCRateMCS32	r819xU_phyreg.h	764;"	d
bTxAGCRateMCS3_MCS0	r819xU_phyreg.h	766;"	d
bTxAGCRateMCS7_MCS4	r819xU_phyreg.h	767;"	d
bTxChEmuEnable	r819xU_phyreg.h	646;"	d
bTxDFIRMode	r819xU_phyreg.h	558;"	d
bTxDataInit	r819xU_phyreg.h	255;"	d
bTxDataType	r819xU_phyreg.h	257;"	d
bTxDisableRateFallBack	ieee80211.h	/^	u8	bTxDisableRateFallBack;$/;"	m	struct:ieee80211_device
bTxDisableRateFallBack	ieee80211.h	/^        u8 bTxDisableRateFallBack:1;$/;"	m	struct:cb_desc
bTxEnableFwCalcDur	ieee80211.h	/^        u8 bTxEnableFwCalcDur:1;$/;"	m	struct:cb_desc
bTxHTAdvanceCoding	r819xU_phyreg.h	245;"	d
bTxHTAggreation	r819xU_phyreg.h	243;"	d
bTxHTBW	r819xU_phyreg.h	237;"	d
bTxHTCRC8	r819xU_phyreg.h	248;"	d
bTxHTLength	r819xU_phyreg.h	238;"	d
bTxHTMCSRate	r819xU_phyreg.h	236;"	d
bTxHTMode	r819xU_phyreg.h	256;"	d
bTxHTNumberHT_LTF	r819xU_phyreg.h	247;"	d
bTxHTReserved	r819xU_phyreg.h	242;"	d
bTxHTSIG1	r819xU_phyreg.h	235;"	d
bTxHTSIG2	r819xU_phyreg.h	239;"	d
bTxHTSTBC	r819xU_phyreg.h	244;"	d
bTxHTShortGI	r819xU_phyreg.h	246;"	d
bTxHTSmoothing	r819xU_phyreg.h	240;"	d
bTxHTSounding	r819xU_phyreg.h	241;"	d
bTxIDCOffset	r819xU_phyreg.h	556;"	d
bTxIdleInterval	r819xU_phyreg.h	252;"	d
bTxLSIG	r819xU_phyreg.h	230;"	d
bTxMACHeader	r819xU_phyreg.h	254;"	d
bTxPathA	r819xU_phyreg.h	500;"	d
bTxPathB	r819xU_phyreg.h	501;"	d
bTxPathC	r819xU_phyreg.h	502;"	d
bTxPathD	r819xU_phyreg.h	503;"	d
bTxPesudoNoiseOn	r819xU_phyreg.h	559;"	d
bTxPesudoNoise_A	r819xU_phyreg.h	560;"	d
bTxPesudoNoise_B	r819xU_phyreg.h	561;"	d
bTxPesudoNoise_C	r819xU_phyreg.h	562;"	d
bTxPesudoNoise_D	r819xU_phyreg.h	563;"	d
bTxQDCOffset	r819xU_phyreg.h	557;"	d
bTxRandomSeed	r819xU_phyreg.h	258;"	d
bTxUseDriverAssingedRate	ieee80211.h	/^	u8 	bTxUseDriverAssingedRate;$/;"	m	struct:ieee80211_device
bTxUseDriverAssingedRate	ieee80211.h	/^        u8 bTxUseDriverAssingedRate:1;$/;"	m	struct:cb_desc
bUChCfg	r819xU_phyreg.h	758;"	d
bUpdCFO	r819xU_phyreg.h	746;"	d
bUpdCFOOffData	r819xU_phyreg.h	747;"	d
bUpdClko	r819xU_phyreg.h	750;"	d
bUpdClkoLTF	r819xU_phyreg.h	754;"	d
bUpdEqz	r819xU_phyreg.h	759;"	d
bUseShortGI	ieee80211.h	/^        u8 bUseShortGI:1;$/;"	m	struct:cb_desc
bUseShortPreamble	ieee80211.h	/^        u8 bUseShortPreamble:1;$/;"	m	struct:cb_desc
bWMACControl	r819xU_phyreg.h	856;"	d
bWNICControl	r819xU_phyreg.h	857;"	d
bWindow_L	r819xU_phyreg.h	530;"	d
bWord0	r819xU_phyreg.h	811;"	d
bWord1	r819xU_phyreg.h	812;"	d
bXATxAGC	r819xU_phyreg.h	277;"	d
bXBTxAGC	r819xU_phyreg.h	278;"	d
bXCTxAGC	r819xU_phyreg.h	279;"	d
bXDTxAGC	r819xU_phyreg.h	280;"	d
bXtalCap	r819xU_phyreg.h	361;"	d
bXtalPowerUp	r819xU_phyreg.h	354;"	d
bZebra1_ChannelNum	r819xU_phyreg.h	791;"	d
bZebra1_HSSIEnable	r819xU_phyreg.h	785;"	d
bZebra1_RxChargePump	r819xU_phyreg.h	790;"	d
bZebra1_RxCorner	r819xU_phyreg.h	788;"	d
bZebra1_RxLPFBW	r819xU_phyreg.h	793;"	d
bZebra1_TRxControl	r819xU_phyreg.h	786;"	d
bZebra1_TRxGainSetting	r819xU_phyreg.h	787;"	d
bZebra1_TxChargePump	r819xU_phyreg.h	789;"	d
bZebra1_TxLPFBW	r819xU_phyreg.h	792;"	d
bZebraRxMixerPole	r819xU_phyreg.h	865;"	d
backoff_val	r8192U_dm.h	/^	u8		backoff_val;$/;"	m	struct:_dynamic_initial_gain_threshold_
bandwidth	r819xU_cmdpkt.h	/^	u8	bandwidth:1;		\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
bandwidth_auto_switch	ieee80211.h	/^	bandwidth_autoswitch bandwidth_auto_switch;$/;"	m	struct:ieee80211_device
bandwidth_autoswitch	ieee80211.h	/^}bandwidth_autoswitch,*pbandwidth_autoswitch;$/;"	t	typeref:struct:_bandwidth_autoswitch
basic_rate	ieee80211.h	/^	int basic_rate;$/;"	m	struct:ieee80211_device
basic_rate	r8192U.h	/^	u16     basic_rate;$/;"	m	struct:r8192_priv
bautoswitch_enable	ieee80211.h	/^	bool bautoswitch_enable;	$/;"	m	struct:_bandwidth_autoswitch
bcck_in_ch14	r8192U.h	/^	bool bcck_in_ch14;$/;"	m	struct:r8192_priv
bcrx_sta_key	ieee80211.h	/^	int bcrx_sta_key; \/* use individual keys to override default keys even$/;"	m	struct:ieee80211_device
bcurrent_turbo_EDCA	r8192U.h	/^	bool		bcurrent_turbo_EDCA;$/;"	m	struct:r8192_priv
bdHTCapBuf	r819xU_HTType.h	/^	u8					bdHTCapBuf[32];$/;"	m	struct:_BSS_HT
bdHTCapLen	r819xU_HTType.h	/^	u16					bdHTCapLen;$/;"	m	struct:_BSS_HT
bdHTInfoBuf	r819xU_HTType.h	/^	u8					bdHTInfoBuf[32];$/;"	m	struct:_BSS_HT
bdHTInfoLen	r819xU_HTType.h	/^	u16					bdHTInfoLen;$/;"	m	struct:_BSS_HT
bdHTSpecVer	r819xU_HTType.h	/^	HT_SPEC_VER				bdHTSpecVer;$/;"	m	struct:_BSS_HT
bdRT2RTAggregation	r819xU_HTType.h	/^	u8					bdRT2RTAggregation;$/;"	m	struct:_BSS_HT
bdRT2RTLongSlotTime	r819xU_HTType.h	/^	u8					bdRT2RTLongSlotTime;$/;"	m	struct:_BSS_HT
bdSupportHT	r819xU_HTType.h	/^	u8				bdSupportHT;$/;"	m	struct:_BSS_HT
bdynamic_txpower	r8192U.h	/^	bool	bdynamic_txpower;  \/\/bDynamicTxPower$/;"	m	struct:r8192_priv
bdynamic_txpower_enable	ieee80211.h	/^	bool	bdynamic_txpower_enable; $/;"	m	struct:ieee80211_device
beacon_interval	ieee80211.h	/^	__le16 beacon_interval;$/;"	m	struct:ieee80211_probe_response
beacon_interval	ieee80211.h	/^	u16 beacon_interval;$/;"	m	struct:ieee80211_network
beacon_lock	ieee80211.h	/^	spinlock_t beacon_lock;$/;"	m	struct:ieee80211_device
beacon_time	ieee80211.h	/^	u32 beacon_time;$/;"	m	struct:ieee80211_rx_stats
beacon_timer	ieee80211.h	/^	struct timer_list beacon_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
beacon_txing	ieee80211.h	/^	short beacon_txing;$/;"	m	struct:ieee80211_device
berp_info	ieee80211.h	/^	u8	berp_info;$/;"	m	struct:ieee80211_network
berp_info_valid	ieee80211.h	/^	bool	berp_info_valid;$/;"	m	struct:ieee80211_network
bforced_tx20Mhz	ieee80211.h	/^	bool bforced_tx20Mhz;$/;"	m	struct:_bandwidth_autoswitch
bfsync_enable	ieee80211.h	/^	bool	bfsync_enable;$/;"	m	struct:ieee80211_device
bfsync_processing	r8192U.h	/^	bool bfsync_processing;	\/\/ 500ms Fsync timer is active or not$/;"	m	struct:r8192_priv
bibsscoordinator	ieee80211.h	/^	bool bibsscoordinator;$/;"	m	struct:ieee80211_device
bis_any_nonbepkts	ieee80211.h	/^	bool		bis_any_nonbepkts;$/;"	m	struct:ieee80211_device
bis_any_nonbepkts	r8192U.h	/^	bool		bis_any_nonbepkts;$/;"	m	struct:r8192_priv
bis_cur_rdlstate	r8192U.h	/^	bool		bis_cur_rdlstate;$/;"	m	struct:r8192_priv
bisrxaggrsubframe	ieee80211.h	/^	bool      	  bisrxaggrsubframe;$/;"	m	struct:ieee80211_rx_stats
bmax_en_pwdB	r819xU_phyreg.h	692;"	d
bnoise_pwdB	r819xU_phyreg.h	694;"	d
bool	ieee80211.h	/^typedef enum{false = 0, true} bool;$/;"	t	typeref:enum:__anon1
bpbc_pressed	r8192U.h	/^	bool bpbc_pressed;$/;"	m	struct:r8192_priv
brfpath_rxenable	r8192U.h	/^	bool 				brfpath_rxenable[4];$/;"	m	struct:r8192_priv
broadcom_cap_exist	ieee80211.h	/^	bool broadcom_cap_exist;$/;"	m	struct:ieee80211_network
bss_ht	ieee80211.h	/^}bss_ht, *pbss_ht;$/;"	t	typeref:struct:_bss_ht
bssht	ieee80211.h	/^	BSS_HT	bssht;$/;"	m	struct:ieee80211_network
bssid	ieee80211.h	/^	u8 bssid[ETH_ALEN];$/;"	m	struct:ieee80211_network
bssid	ieee80211.h	/^        u8 bssid[ETH_ALEN];$/;"	m	struct:ieee80211_device
bstart_txctrl_bydtp	r8192U.h	/^	bool	bstart_txctrl_bydtp;   \/\/Define to discriminate on High power State or on sitesuvey to change Tx gain index	$/;"	m	struct:r8192_priv
bstore_last_dtpflag	r8192U.h	/^	bool	bstore_last_dtpflag;$/;"	m	struct:r8192_priv
bswitch_fsync	r8192U.h	/^	bool bswitch_fsync;$/;"	m	struct:r8192_priv
btxpower_tracking	r8192U.h	/^	bool btxpower_tracking;$/;"	m	struct:r8192_priv
btxpower_trackingInit	r8192U.h	/^	bool			   btxpower_trackingInit;$/;"	m	struct:r8192_priv
btxpowerdata_readfromEEPORM	r8192U.h	/^	bool btxpowerdata_readfromEEPORM;$/;"	m	struct:r8192_priv
buf	r8192U.h	/^	u32 *buf;$/;"	m	struct:buffer
buf	r8192U.h	/^        unsigned char buf[0xff];$/;"	m	struct:rtl_reg_debug
buffer	r8192U.h	/^typedef struct buffer$/;"	s
buffer	r8192U.h	/^} buffer;$/;"	t	typeref:struct:buffer
buseprotection	ieee80211.h	/^	bool buseprotection;$/;"	m	struct:ieee80211_network
bw_spinlock	ieee80211.h	/^	spinlock_t bw_spinlock;$/;"	m	struct:ieee80211_device
bwin_enh_L	r819xU_phyreg.h	525;"	d
capability	ieee80211.h	/^	__le16 capability;$/;"	m	struct:ieee80211_assoc_request_frame
capability	ieee80211.h	/^	__le16 capability;$/;"	m	struct:ieee80211_assoc_response_frame
capability	ieee80211.h	/^	__le16 capability;$/;"	m	struct:ieee80211_probe_response
capability	ieee80211.h	/^	__le16 capability;$/;"	m	struct:ieee80211_reassoc_request_frame
capability	ieee80211.h	/^	u16 capability;$/;"	m	struct:ieee80211_network
card_8192	r8192U.h	/^	short card_8192; \/* O: rtl8192, 1:rtl8185 V B\/C, 2:rtl8185 V D *\/$/;"	m	struct:r8192_priv
card_8192_version	r8192U.h	/^	u8 card_8192_version; \/* if TCR reports card V B\/C this discriminates *\/$/;"	m	struct:r8192_priv
card_type	r8192U.h	/^	enum card_type {PCI,MINIPCI,CARDBUS,USB\/*rtl8187*\/}card_type;$/;"	g	struct:r8192_priv
card_type	r8192U.h	/^	enum card_type {PCI,MINIPCI,CARDBUS,USB\/*rtl8187*\/}card_type;$/;"	m	struct:r8192_priv	typeref:enum:r8192_priv::card_type
cb_desc	ieee80211.h	/^typedef struct cb_desc {$/;"	s
cb_desc	ieee80211.h	/^}cb_desc, *pcb_desc;$/;"	t	typeref:struct:cb_desc
cca	r8192U.h	/^	u8				cca;$/;"	m	struct:_init_gain
cck	r8192U.h	/^	u32             cck[4];$/;"	m	struct:_rt_9x_tx_rate_history
cck	r819xU_cmdpkt.h	/^	u16 	cck[4];$/;"	m	struct:tag_tx_rate_history
cck_Rx_path	r8192U_dm.h	/^	u8		cck_Rx_path;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
cck_adc_pwdb	ieee80211.h	/^	char 	  cck_adc_pwdb[4];	\/\/cosa add for rx path selection$/;"	m	struct:ieee80211_rx_stats
cck_adc_pwdb	r8192U.h	/^	RT_SMOOTH_DATA_4RF              cck_adc_pwdb;$/;"	m	struct:Stats
cck_agc_rpt	r8192U.h	/^	u8	cck_agc_rpt;$/;"	m	struct:_phy_cck_rx_status_report_819xusb
cck_method	r8192U_dm.h	/^	u8		cck_method;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
cck_present_attentuation	r8192U.h	/^	u8 cck_present_attentuation;$/;"	m	struct:r8192_priv
cck_pwdb_sta	r8192U_dm.h	/^	long		cck_pwdb_sta[4];$/;"	m	struct:_Dynamic_Rx_Path_Selection_
cck_txbbgain_ch14_table	r8192U.h	/^	ccktxbbgain_struct	cck_txbbgain_ch14_table[CCKTxBBGainTableLength];$/;"	m	struct:r8192_priv
cck_txbbgain_table	r8192U.h	/^	ccktxbbgain_struct	cck_txbbgain_table[CCKTxBBGainTableLength];$/;"	m	struct:r8192_priv
ccktxbb_valuearray	r8192U.h	/^	u8	ccktxbb_valuearray[8];$/;"	m	struct:_ccktxbbgain_struct
ccktxbbgain_struct	r8192U.h	/^} ccktxbbgain_struct,*pccktxbbgain_struct;$/;"	t	typeref:struct:_ccktxbbgain_struct
ccktxpower_adjustcnt_ch14	r8192U.h	/^	u32 ccktxpower_adjustcnt_ch14;$/;"	m	struct:r8192_priv
ccktxpower_adjustcnt_not_ch14	r8192U.h	/^	u32 ccktxpower_adjustcnt_not_ch14;$/;"	m	struct:r8192_priv
ccmp_ie	r8192U_core.c	/^static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};$/;"	v	file:
ccmp_rsn_ie	r8192U_core.c	/^static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};$/;"	v	file:
cfg_action	r819xU_cmdpkt.h	/^	u8	cfg_action:1;		\/* Configuration info. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
cfg_offset	r819xU_cmdpkt.h	/^	u8	cfg_offset;			\/* Configuration info. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
cfg_page	r819xU_cmdpkt.h	/^	u8	cfg_page:4;			\/* Configuration info. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
cfg_reserve1	r819xU_cmdpkt.h	/^	u8 	cfg_reserve1:3;$/;"	m	struct:tag_cmd_pkt_set_configuration
cfg_reserve2	r819xU_cmdpkt.h	/^	u8	cfg_reserve2;		\/* Configuration info. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
cfg_reserve3	r819xU_cmdpkt.h	/^	u8	cfg_reserve3:4;		\/* Configuration info. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
cfg_size	r819xU_cmdpkt.h	/^	u8	cfg_size:2;			\/* Configuration info. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
cfg_type	r819xU_cmdpkt.h	/^	u8	cfg_type:2;			\/* Configuration info. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
cfosho_X	r8192U.h	/^	u8	cfosho_X[4];$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
cfotail_X	r8192U.h	/^	u8	cfotail_X[4];$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
chan	r8192U.h	/^	short chan;$/;"	m	struct:r8192_priv
channel	ieee80211.h	/^	u8 channel;$/;"	m	struct:ieee80211_network
channel_map	ieee80211.h	/^	int channel_map[MAX_CHANNEL_NUMBER+1];$/;"	m	struct:ieee80211_device
channels	r8192U_core.c	/^static int channels = 0x3fff;$/;"	v	file:
chardata	ieee80211.h	/^	u8  chardata[2];$/;"	m	union:_frameqos
check_nic_enough_desc	ieee80211.h	/^	short (*check_nic_enough_desc)(struct net_device *dev, int queue_index);$/;"	m	struct:ieee80211_device
check_nic_enough_desc	r8192U_core.c	/^short check_nic_enough_desc(struct net_device *dev,int queue_index)$/;"	f
ciper_reject	ieee80211.h	/^	ciper_reject		= 0x18,$/;"	e	enum:_ReasonCode
class2_err	ieee80211.h	/^	class2_err		= 0x6,$/;"	e	enum:_ReasonCode
class3_err	ieee80211.h	/^	class3_err		= 0x7, $/;"	e	enum:_ReasonCode
cmd	ieee80211.h	/^	u32 cmd;$/;"	m	struct:ieee_param
cmd	r8192U.h	/^	u32 cmd;$/;"	m	struct:ipw_param
cmd	r8192U.h	/^        unsigned int  cmd;$/;"	m	struct:rtl_reg_debug
cmdpacket_frag_thresold	r8192U.h	/^	u16               cmdpacket_frag_thresold;$/;"	m	struct:_rt_firmware
cmdpkt_beacontimerinterrupt_819xusb	r819xU_cmdpkt.c	/^cmdpkt_beacontimerinterrupt_819xusb($/;"	f
cmpk_count_tx_status	r819xU_cmdpkt.c	/^static	void	cmpk_count_tx_status(	struct net_device *dev,     $/;"	f	file:
cmpk_count_txstatistic	r819xU_cmdpkt.c	/^cmpk_count_txstatistic($/;"	f	file:
cmpk_element_e	r819xU_cmdpkt.h	/^}cmpk_element_e;$/;"	t	typeref:enum:tag_command_packet_directories
cmpk_handle_interrupt_status	r819xU_cmdpkt.c	/^cmpk_handle_interrupt_status($/;"	f	file:
cmpk_handle_query_config_rx	r819xU_cmdpkt.c	/^cmpk_handle_query_config_rx($/;"	f	file:
cmpk_handle_tx_feedback	r819xU_cmdpkt.c	/^cmpk_handle_tx_feedback($/;"	f	file:
cmpk_handle_tx_rate_history	r819xU_cmdpkt.c	/^cmpk_handle_tx_rate_history($/;"	f	file:
cmpk_handle_tx_status	r819xU_cmdpkt.c	/^cmpk_handle_tx_status($/;"	f	file:
cmpk_intr_sta_t	r819xU_cmdpkt.h	/^}cmpk_intr_sta_t;$/;"	t	typeref:struct:tag_cmd_pkt_interrupt_status
cmpk_message_handle_rx	r819xU_cmdpkt.c	/^cmpk_message_handle_rx($/;"	f
cmpk_message_handle_tx	r819xU_cmdpkt.c	/^ extern	rt_status	cmpk_message_handle_tx($/;"	f
cmpk_query_cfg_t	r819xU_cmdpkt.h	99;"	d
cmpk_rx_dbginfo_t	r819xU_cmdpkt.h	/^}cmpk_rx_dbginfo_t;$/;"	t	typeref:struct:tag_rx_debug_message_feedback
cmpk_set_cfg_t	r819xU_cmdpkt.h	/^}cmpk_set_cfg_t;$/;"	t	typeref:struct:tag_cmd_pkt_set_configuration
cmpk_tx_rahis_t	r819xU_cmdpkt.h	/^}__attribute__((packed)) cmpk_tx_rahis_t;$/;"	t	typeref:struct:tag_tx_rate_history
cmpk_tx_status_t	r819xU_cmdpkt.h	/^}__attribute__((packed)) cmpk_tx_status_t;$/;"	t	typeref:struct:tag_tx_stats_feedback
cmpk_txfb_t	r819xU_cmdpkt.h	/^}cmpk_txfb_t;$/;"	t	typeref:struct:tag_cmd_pkt_tx_feedback
command	ieee80211.h	/^			int command;$/;"	m	struct:ieee_param::__anon2::__anon5
command	r8192U.h	/^			u32 command;$/;"	m	struct:ipw_param::__anon9::__anon12
config	ieee80211.h	/^	u32 config;$/;"	m	struct:ieee80211_device
control	ieee80211.h	/^	u8 control;$/;"	m	struct:ieee80211_rx_stats
crcmon	r8192U.h	/^	short crcmon; \/\/if 1 allow bad crc frame reception in monitor mode$/;"	m	struct:r8192_priv
crypt	ieee80211.h	/^		} crypt;$/;"	m	union:ieee_param::__anon2	typeref:struct:ieee_param::__anon2::__anon6
crypt	ieee80211.h	/^	struct ieee80211_crypt_data *crypt[WEP_KEYS];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_crypt_data
crypt	r8192U.h	/^		} crypt;$/;"	m	union:ipw_param::__anon9	typeref:struct:ipw_param::__anon9::__anon13
crypt_deinit_list	ieee80211.h	/^	struct list_head crypt_deinit_list;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
crypt_deinit_timer	ieee80211.h	/^	struct timer_list crypt_deinit_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
crypt_quiesced	ieee80211.h	/^        int crypt_quiesced;$/;"	m	struct:ieee80211_device
csi_current_X	r8192U.h	/^	u8	csi_current_X[2];$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
csi_target_X	r8192U.h	/^	u8	csi_target_X[2];$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
ctrl	ieee80211.h	/^        u8    ctrl;   \/* always 0x03 *\/$/;"	m	struct:ieee80211_snap_hdr
cur_connect_state	r8192U_dm.h	/^	u8		cur_connect_state;$/;"	m	struct:_dynamic_initial_gain_threshold_
cur_ig_value	r8192U_dm.h	/^	u32		cur_ig_value;$/;"	m	struct:_dynamic_initial_gain_threshold_
curcs_ratio_state	r8192U_dm.h	/^	u8		curcs_ratio_state;$/;"	m	struct:_dynamic_initial_gain_threshold_
curpd_thstate	r8192U_dm.h	/^	u8		curpd_thstate;$/;"	m	struct:_dynamic_initial_gain_threshold_
current_ap	ieee80211.h	/^	u8 current_ap[ETH_ALEN];$/;"	m	struct:ieee80211_reassoc_request_frame
current_network	ieee80211.h	/^	struct ieee80211_network current_network;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_network
cw_max	ieee80211.h	/^        __le16 cw_max[QOS_QUEUE_NUM];$/;"	m	struct:ieee80211_qos_parameters
cw_min	ieee80211.h	/^        __le16 cw_min[QOS_QUEUE_NUM];$/;"	m	struct:ieee80211_qos_parameters
data	ieee80211.h	/^			u8 data[0];$/;"	m	struct:ieee_param::__anon2::__anon4
data	ieee80211.h	/^	u8 data[0];$/;"	m	struct:ieee80211_info_element
data	r8192U.h	/^			u8 data[0];$/;"	m	struct:ipw_param::__anon9::__anon11
data_hard_resume	ieee80211.h	/^	void (*data_hard_resume)(struct net_device *dev);$/;"	m	struct:ieee80211_device
data_hard_stop	ieee80211.h	/^	void (*data_hard_stop)(struct net_device *dev);$/;"	m	struct:ieee80211_device
data_rate	ieee80211.h	/^        u8 data_rate;$/;"	m	struct:cb_desc
dbg_mode	r8192U_dm.h	/^	u8		dbg_mode;$/;"	m	struct:_dynamic_initial_gain_threshold_
deauth_lv_ss	ieee80211.h	/^	deauth_lv_ss	= 0x3, $/;"	e	enum:_ReasonCode
decrypt_mpdu	ieee80211_crypt.h	/^	int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);$/;"	m	struct:ieee80211_crypto_ops
decrypt_msdu	ieee80211_crypt.h	/^	int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,$/;"	m	struct:ieee80211_crypto_ops
def_qos_parameters	r8192U_core.c	/^static struct ieee80211_qos_parameters def_qos_parameters = {$/;"	v	typeref:struct:ieee80211_qos_parameters	file:
deinit	ieee80211_crypt.h	/^	void (*deinit)(void *priv);$/;"	m	struct:ieee80211_crypto_ops
deinit_hal_dm	r8192U_dm.c	/^extern void deinit_hal_dm(struct net_device *dev)$/;"	f
delay_bound	ieee80211.h	/^	u32 delay_bound;$/;"	m	struct:ieee80211_wmm_tspec_elem
desc_packet_type_e	r8192U.h	/^}desc_packet_type_e;$/;"	t	typeref:enum:_desc_packet_type_e
dest_not_QSTA	ieee80211.h	/^	dest_not_QSTA	= 0x32, \/\/ 50$/;"	e	enum:_ReasonCode
dest_not_exist	ieee80211.h	/^	dest_not_exist	= 0x31, \/\/ 49$/;"	e	enum:_ReasonCode
dev	ieee80211.h	/^	struct net_device *dev;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::net_device
dev	r8192U.h	/^	struct net_device *dev;$/;"	m	struct:rtl8192_rx_info	typeref:struct:rtl8192_rx_info::net_device
dev	r8192U.h	/^	struct net_device *dev;$/;"	m	struct:ssid_thread	typeref:struct:ssid_thread::net_device
diff_TH	r8192U_dm.h	/^	u8		diff_TH;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
dig_algorithm	r8192U_dm.h	/^	u8		dig_algorithm;$/;"	m	struct:_dynamic_initial_gain_threshold_
dig_algorithm_switch	r8192U_dm.h	/^	u8		dig_algorithm_switch;$/;"	m	struct:_dynamic_initial_gain_threshold_
dig_enable_flag	r8192U_dm.h	/^	u8		dig_enable_flag;$/;"	m	struct:_dynamic_initial_gain_threshold_
dig_highpwr_state	r8192U_dm.h	/^	u8		dig_highpwr_state;$/;"	m	struct:_dynamic_initial_gain_threshold_
dig_state	r8192U_dm.h	/^	u8		dig_state;$/;"	m	struct:_dynamic_initial_gain_threshold_
dig_t	r8192U_dm.h	/^}dig_t;$/;"	t	typeref:struct:_dynamic_initial_gain_threshold_
dir_dev	r8192U.h	/^	struct proc_dir_entry *dir_dev;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::proc_dir_entry
disabledRF	r8192U_dm.h	/^	u8		disabledRF;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
disas_lv_ss	ieee80211.h	/^	disas_lv_ss 	= 0x8,$/;"	e	enum:_ReasonCode
dm_CheckRxAggregation	r8192U_dm.c	/^void dm_CheckRxAggregation(struct net_device *dev) {$/;"	f
dm_EndHWFsync	r8192U_dm.c	/^static void dm_EndHWFsync(struct net_device *dev)$/;"	f	file:
dm_EndSWFsync	r8192U_dm.c	/^static void dm_EndSWFsync(struct net_device *dev)$/;"	f	file:
dm_StartHWFsync	r8192U_dm.c	/^static void dm_StartHWFsync(struct net_device *dev)$/;"	f	file:
dm_StartSWFsync	r8192U_dm.c	/^static void dm_StartSWFsync(struct net_device *dev)$/;"	f	file:
dm_backup_dynamic_mechanism_state	r8192U_dm.c	/^extern void dm_backup_dynamic_mechanism_state(struct net_device *dev)$/;"	f
dm_bandwidth_autoswitch	r8192U_dm.c	/^static void dm_bandwidth_autoswitch(struct net_device * dev)$/;"	f	file:
dm_bb_initialgain_backup	r8192U_dm.c	/^static void dm_bb_initialgain_backup(struct net_device *dev)$/;"	f	file:
dm_bb_initialgain_restore	r8192U_dm.c	/^static void dm_bb_initialgain_restore(struct net_device *dev)$/;"	f	file:
dm_cck_txpower_adjust	r8192U_dm.c	/^extern void dm_cck_txpower_adjust($/;"	f
dm_change_dynamic_initgain_thresh	r8192U_dm.c	/^extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,$/;"	f
dm_change_fsync_setting	r8192U_dm.c	/^dm_change_fsync_setting($/;"	f
dm_change_rxpath_selection_setting	r8192U_dm.c	/^dm_change_rxpath_selection_setting(	$/;"	f
dm_check_edca_turbo	r8192U_dm.c	/^static void dm_check_edca_turbo($/;"	f	file:
dm_check_fsync	r8192U_dm.c	/^void dm_check_fsync(struct net_device *dev)$/;"	f
dm_check_pbc_gpio	r8192U_dm.c	/^static	void	dm_check_pbc_gpio(struct net_device *dev)$/;"	f	file:
dm_check_rate_adaptive	r8192U_dm.c	/^static void dm_check_rate_adaptive(struct net_device * dev)$/;"	f	file:
dm_check_rfctrl_gpio	r8192U_dm.c	/^static void dm_check_rfctrl_gpio(struct net_device * dev)$/;"	f	file:
dm_check_rx_path_selection	r8192U_dm.c	/^static	void	dm_check_rx_path_selection(struct net_device *dev)$/;"	f	file:
dm_check_txpower_tracking	r8192U_dm.c	/^static void dm_check_txpower_tracking(struct net_device *dev)$/;"	f	file:
dm_check_txrateandretrycount	r8192U_dm.c	/^static void dm_check_txrateandretrycount(struct net_device * dev)$/;"	f	file:
dm_cs_ratio	r8192U_dm.c	/^static	void dm_cs_ratio($/;"	f	file:
dm_ctrl_initgain_byrssi	r8192U_dm.c	/^static void dm_ctrl_initgain_byrssi($/;"	f	file:
dm_ctrl_initgain_byrssi_by_driverrssi	r8192U_dm.c	/^static void dm_ctrl_initgain_byrssi_by_driverrssi($/;"	f	file:
dm_ctrl_initgain_byrssi_by_fwfalse_alarm	r8192U_dm.c	/^static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm($/;"	f	file:
dm_ctrl_initgain_byrssi_highpwr	r8192U_dm.c	/^static void dm_ctrl_initgain_byrssi_highpwr($/;"	f	file:
dm_ctstoself	r8192U_dm.c	/^static void dm_ctstoself(struct net_device *dev)$/;"	f	file:
dm_deInit_fsync	r8192U_dm.c	/^static void dm_deInit_fsync(struct net_device *dev)$/;"	f	file:
dm_dig_alg_e	r8192U_dm.h	/^}dm_dig_alg_e;$/;"	t	typeref:enum:tag_dig_algorithm_definition
dm_dig_connect_e	r8192U_dm.h	/^}dm_dig_connect_e;$/;"	t	typeref:enum:tag_dig_connect_definition
dm_dig_cs_ratio_e	r8192U_dm.h	/^}dm_dig_cs_ratio_e;$/;"	t	typeref:enum:tag_dig_cck_cs_ratio_state_definition
dm_dig_dbg_e	r8192U_dm.h	/^}dm_dig_dbg_e;$/;"	t	typeref:enum:tag_dig_dbgmode_definition
dm_dig_init	r8192U_dm.c	/^static void dm_dig_init(struct net_device *dev)$/;"	f	file:
dm_dig_op_e	r8192U_dm.h	/^}dm_dig_op_e;$/;"	t	typeref:enum:tag_dynamic_init_gain_operation_type_definition
dm_dig_pd_th_e	r8192U_dm.h	/^}dm_dig_pd_th_e;$/;"	t	typeref:enum:tag_dig_packetdetection_threshold_definition
dm_dig_sta_e	r8192U_dm.h	/^}dm_dig_sta_e;$/;"	t	typeref:enum:tag_dynamic_init_gain_state_definition
dm_digtable	r8192U_dm.c	/^dig_t	dm_digtable;$/;"	v
dm_dynamic_txpower	r8192U_dm.c	/^static void dm_dynamic_txpower(struct net_device *dev)$/;"	f	file:
dm_force_tx_fw_info	r8192U_dm.c	/^extern void dm_force_tx_fw_info(struct net_device *dev,$/;"	f
dm_fsync_timer_callback	r8192U_dm.c	/^extern void dm_fsync_timer_callback(unsigned long data)$/;"	f
dm_init_bandwidth_autoswitch	r8192U_dm.c	/^static void dm_init_bandwidth_autoswitch(struct net_device * dev)$/;"	f	file:
dm_init_ctstoself	r8192U_dm.c	/^static void dm_init_ctstoself(struct net_device * dev)$/;"	f	file:
dm_init_dynamic_txpower	r8192U_dm.c	/^static void dm_init_dynamic_txpower(struct net_device *dev)$/;"	f	file:
dm_init_edca_turbo	r8192U_dm.c	/^extern void dm_init_edca_turbo(struct net_device * dev)$/;"	f
dm_init_fsync	r8192U_dm.c	/^static void dm_init_fsync (struct net_device *dev)$/;"	f	file:
dm_init_rxpath_selection	r8192U_dm.c	/^static void dm_init_rxpath_selection(struct net_device * dev)$/;"	f	file:
dm_initial_gain	r8192U_dm.c	/^static void dm_initial_gain($/;"	f	file:
dm_initialize_txpower_tracking	r8192U_dm.c	/^static void dm_initialize_txpower_tracking(struct net_device *dev)$/;"	f	file:
dm_pd_th	r8192U_dm.c	/^static void dm_pd_th(	$/;"	f	file:
dm_ratr_sta_e	r8192U_dm.h	/^}dm_ratr_sta_e;$/;"	t	typeref:enum:tag_dynamic_ratr_state_definition
dm_restore_dynamic_mechanism_state	r8192U_dm.c	/^extern void dm_restore_dynamic_mechanism_state(struct net_device *dev)$/;"	f
dm_rf_operation_test_callback	r8192U_dm.c	/^extern void dm_rf_operation_test_callback(unsigned long dev)$/;"	f
dm_rf_pathcheck_workitemcallback	r8192U_dm.c	/^extern	void	dm_rf_pathcheck_workitemcallback(struct work_struct *work)$/;"	f
dm_rxpath_sel_byrssi	r8192U_dm.c	/^static void dm_rxpath_sel_byrssi(struct net_device * dev)$/;"	f	file:
dm_send_rssi_tofw	r8192U_dm.c	/^static void dm_send_rssi_tofw(struct net_device *dev)$/;"	f	file:
dm_shadow	r8192U_dm.c	/^u8		dm_shadow[16][256] = {{0}};$/;"	v
dm_shadow_init	r8192U_dm.c	/^extern void dm_shadow_init(struct net_device *dev)$/;"	f
dm_txpower_reset_recovery	r8192U_dm.c	/^static void dm_txpower_reset_recovery($/;"	f	file:
dm_txpower_trackingcallback	r8192U_dm.c	/^extern	void	dm_txpower_trackingcallback(struct work_struct *work)$/;"	f
dot11HTOperationalRateSet	ieee80211.h	/^	u8	dot11HTOperationalRateSet[16];		\/\/use RATR format$/;"	m	struct:ieee80211_device
drop_unencrypted	ieee80211.h	/^	int drop_unencrypted;$/;"	m	struct:ieee80211_device
drv_agg_enable	ieee80211.h	/^        u8 drv_agg_enable:1;$/;"	m	struct:cb_desc
dsap	ieee80211.h	/^        u8    dsap;   \/* always 0xAA *\/$/;"	m	struct:ieee80211_snap_hdr
dst	ieee80211.h	/^	u8 dst[ETH_ALEN];$/;"	m	struct:ieee80211_rxb
dst_addr	ieee80211.h	/^	u8 dst_addr[ETH_ALEN];$/;"	m	struct:ieee80211_frag_entry
dtim_data	ieee80211.h	/^	u8  dtim_data;$/;"	m	struct:ieee80211_network
dtim_period	ieee80211.h	/^	u8  dtim_period;$/;"	m	struct:ieee80211_network
dummy	r8192U_wx.c	/^static int dummy(struct net_device *dev, struct iw_request_info *a,$/;"	f	file:
dump_eprom	r8192U_core.c	/^void dump_eprom(struct net_device *dev)$/;"	f
duration	r819xU_cmdpkt.h	/^	u16	duration;			\/* *\/	$/;"	m	struct:tag_cmd_pkt_tx_feedback
duration_id	ieee80211.h	/^	__le16 duration_id;$/;"	m	struct:ieee80211_hdr_3addr
duration_id	ieee80211.h	/^	__le16 duration_id;$/;"	m	struct:ieee80211_hdr_3addrqos
duration_id	ieee80211.h	/^	__le16 duration_id;$/;"	m	struct:ieee80211_hdr_4addr
duration_id	ieee80211.h	/^	__le16 duration_id;$/;"	m	struct:ieee80211_hdr_4addrqos
duration_id	ieee80211.h	/^        __le16 duration_id;$/;"	m	struct:ieee80211_hdr
duration_id	ieee80211.h	/^        __le16 duration_id;$/;"	m	struct:ieee80211_hdr_1addr
duration_id	ieee80211.h	/^        __le16 duration_id;$/;"	m	struct:ieee80211_hdr_2addr
ePeerHTSpecVer	r819xU_HTType.h	/^	HT_SPEC_VER			ePeerHTSpecVer;$/;"	m	struct:_RT_HIGH_THROUGHPUT
eRFPowerState	r8192U.h	/^	RT_RF_POWER_STATE		eRFPowerState;$/;"	m	struct:r8192_priv
eRfOff	r8192U.h	/^	eRfOff$/;"	e	enum:_RT_RF_POWER_STATE
eRfOn	r8192U.h	/^        eRfOn,$/;"	e	enum:_RT_RF_POWER_STATE
eRfSleep	r8192U.h	/^	eRfSleep,$/;"	e	enum:_RT_RF_POWER_STATE
eap_get_type	ieee80211.h	/^static inline const char *eap_get_type(int type)$/;"	f
eap_type	ieee80211.h	/^enum eap_type {$/;"	g
eap_types	ieee80211.h	/^static const char *eap_types[] = {$/;"	v
eapol	ieee80211.h	/^struct eapol {$/;"	s
ecw_min_max	ieee80211.h	/^        u8 ecw_min_max;$/;"	m	struct:ieee80211_qos_ac_parameter
edca_setting_DL	r8192U_dm.c	/^static u32 edca_setting_DL[HT_IOT_PEER_MAX] = $/;"	v	file:
edca_setting_UL	r8192U_dm.c	/^static u32 edca_setting_UL[HT_IOT_PEER_MAX] = $/;"	v	file:
eeprom_ChannelPlan	r8192U.h	/^	u8  eeprom_ChannelPlan;$/;"	m	struct:r8192_priv
eeprom_CustomerID	r8192U.h	/^	u8  eeprom_CustomerID;$/;"	m	struct:r8192_priv
eeprom_pid	r8192U.h	/^	u16 eeprom_pid;$/;"	m	struct:r8192_priv
eeprom_vid	r8192U.h	/^	u16 eeprom_vid;$/;"	m	struct:r8192_priv
elementID	ieee80211.h	/^        u8 elementID;$/;"	m	struct:ieee80211_qos_information_element
element_id	r819xU_cmdpkt.h	/^	u8	element_id;			\/* Command packet type. *\/$/;"	m	struct:tag_cmd_pkt_interrupt_status
element_id	r819xU_cmdpkt.h	/^	u8	element_id;			\/* Command packet type. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
element_id	r819xU_cmdpkt.h	/^	u8	element_id;			\/* Command packet type. *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
element_id	r819xU_cmdpkt.h	/^	u8 	element_id;			\/\/ Command packet type$/;"	m	struct:tag_rx_debug_message_feedback
element_id	r819xU_cmdpkt.h	/^	u8 	element_id;			\/\/ Command packet type$/;"	m	struct:tag_tx_rate_history
element_id	r819xU_cmdpkt.h	/^	u8 	element_id;			\/\/ Command packet type$/;"	m	struct:tag_tx_stats_feedback
elements	r8192U.h	/^	char    elements[4][100];\/\/array to store values$/;"	m	struct:_RT_SMOOTH_DATA_4RF
enable_gpio0	r8192U.h	/^	short enable_gpio0;$/;"	m	struct:r8192_priv
enable_rx_imm_BA	ieee80211.h	/^	bool enable_rx_imm_BA;$/;"	m	struct:ieee80211_device
enabled	ieee80211.h	/^            enabled:1,$/;"	m	struct:ieee80211_security
encrypt	ieee80211.h	/^	    encrypt:1;$/;"	m	struct:ieee80211_security
encrypt_mpdu	ieee80211_crypt.h	/^	int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);$/;"	m	struct:ieee80211_crypto_ops
encrypt_msdu	ieee80211_crypt.h	/^	int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);$/;"	m	struct:ieee80211_crypto_ops
encrypted	ieee80211.h	/^	u8 encrypted;$/;"	m	struct:ieee80211_txb
endian_swap	r8192U_core.c	/^static inline u16 endian_swap(u16* data)$/;"	f	file:
enter_sleep_state	ieee80211.h	/^	void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);$/;"	m	struct:ieee80211_device
eosp	ieee80211.h	/^		u16 eosp:1;$/;"	m	struct:_frameqos::__anon7
eprom_ck_cycle	r8180_93cx6.c	/^void eprom_ck_cycle(struct net_device *dev)$/;"	f
eprom_cs	r8180_93cx6.c	/^void eprom_cs(struct net_device *dev, short bit)$/;"	f
eprom_r	r8180_93cx6.c	/^short eprom_r(struct net_device *dev)$/;"	f
eprom_read	r8180_93cx6.c	/^u32 eprom_read(struct net_device *dev, u32 addr)$/;"	f
eprom_send_bits_string	r8180_93cx6.c	/^void eprom_send_bits_string(struct net_device *dev, short b[], int len)$/;"	f
eprom_w	r8180_93cx6.c	/^void eprom_w(struct net_device *dev,short bit)$/;"	f
epromtype	r8192U.h	/^	short epromtype;$/;"	m	struct:r8192_priv
eqMacAddr	r8192U_core.c	193;"	d	file:
erp_t	ieee80211.h	/^} erp_t;$/;"	t	typeref:enum:_erp_t
erp_value	ieee80211.h	/^	u8  erp_value;$/;"	m	struct:ieee80211_network
err	ieee80211.h	/^			u32 err;$/;"	m	struct:ieee_param::__anon2::__anon6
err	r8192U.h	/^			u32 err;$/;"	m	struct:ipw_param::__anon9::__anon13
escape_essid	ieee80211.h	/^static inline const char *escape_essid(const char *essid, u8 essid_len) {$/;"	f
ether_dhost	ieee80211.h	/^	u8 ether_dhost[ETHER_ADDR_LEN];$/;"	m	struct:ether_header
ether_header	ieee80211.h	/^struct	ether_header {$/;"	s
ether_shost	ieee80211.h	/^	u8 ether_shost[ETHER_ADDR_LEN];$/;"	m	struct:ether_header
ether_type	ieee80211.h	/^	u16 ether_type;$/;"	m	struct:ether_header
ethertype	ieee80211.h	/^	u16 ethertype;$/;"	m	struct:eapol
ex_intf_flag	r8192U.h	/^	u8			ex_intf_flag:1;	$/;"	m	struct:_phy_ofdm_rx_status_rxsc_sgien_exintfflag
extra_postfix_len	ieee80211_crypt.h	/^	int extra_prefix_len, extra_postfix_len;$/;"	m	struct:ieee80211_crypto_ops
extra_prefix_len	ieee80211_crypt.h	/^	int extra_prefix_len, extra_postfix_len;$/;"	m	struct:ieee80211_crypto_ops
f_rate	r819xU_cmdpkt.h	/^	u8	f_rate;				\/* Final rate. *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
f_rts_rate	r819xU_cmdpkt.h	/^	u8	f_rts_rate;			\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
fail_reason	r819xU_cmdpkt.h	/^	u8	fail_reason:3;		\/* *\/		$/;"	m	struct:tag_cmd_pkt_tx_feedback
false	ieee80211.h	/^typedef enum{false = 0, true} bool;$/;"	e	enum:__anon1
field	ieee80211.h	/^	}field;$/;"	m	union:_frameqos	typeref:struct:_frameqos::__anon7
firmware_buf	r8192U.h	/^	u8                firmware_buf[RTL8190_MAX_FIRMWARE_CODE_SIZE];$/;"	m	struct:_rt_firmware
firmware_buf_size	r8192U.h	/^	u16               firmware_buf_size;$/;"	m	struct:_rt_firmware
firmware_init_param	r819xU_firmware.c	/^void firmware_init_param(struct net_device *dev)$/;"	f
firmware_init_step_e	r819xU_firmware.h	/^}firmware_init_step_e;$/;"	t	typeref:enum:_firmware_init_step
firmware_source	r8192U.h	/^	firmware_source_e	firmware_source;$/;"	m	struct:r8192_priv
firmware_source_e	r8192U.h	/^}firmware_source_e, *pfirmware_source_e;$/;"	t	typeref:enum:_firmware_source
firmware_status	r8192U.h	/^	firmware_status_e firmware_status;$/;"	m	struct:_rt_firmware
firmware_status_e	r8192U.h	/^}firmware_status_e;$/;"	t	typeref:enum:_firmware_status
first_frag_time	ieee80211.h	/^	unsigned long first_frag_time;$/;"	m	struct:ieee80211_frag_entry
flag	ieee80211.h	/^        u8 flag[QOS_QUEUE_NUM];$/;"	m	struct:ieee80211_qos_parameters
flags	ieee80211.h	/^	u16 flags;$/;"	m	struct:ieee80211_security
flags	ieee80211.h	/^	u32 flags;$/;"	m	struct:ieee80211_network
force_pci_posting	r8192U_core.c	/^inline void force_pci_posting(struct net_device *dev)$/;"	f
four_way_tmout	ieee80211.h	/^	four_way_tmout	= 0x0f,$/;"	e	enum:_ReasonCode
frag	ieee80211.h	/^	int frag;$/;"	m	struct:tx_pending_t
frag_cache	ieee80211.h	/^	struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_frag_entry
frag_next_idx	ieee80211.h	/^	unsigned int frag_next_idx[17];$/;"	m	struct:ieee80211_device
frag_num	ieee80211.h	/^	u16 frag_num[17];$/;"	m	struct:ieee_ibss_seq
frag_size	ieee80211.h	/^	__le16 frag_size;$/;"	m	struct:ieee80211_txb
fraglength	ieee80211.h	/^	u16          fraglength;                        \/\/ FragLength should equal to PacketLength in non-fragment case$/;"	m	struct:ieee80211_rx_stats
fragments	ieee80211.h	/^	struct sk_buff *fragments[0];$/;"	m	struct:ieee80211_txb	typeref:struct:ieee80211_txb::sk_buff
fragoffset	ieee80211.h	/^	u16          fragoffset;                        \/\/ Data offset for this fragment$/;"	m	struct:ieee80211_rx_stats
frame_ctl	ieee80211.h	/^	__le16 frame_ctl;$/;"	m	struct:ieee80211_hdr_3addr
frame_ctl	ieee80211.h	/^	__le16 frame_ctl;$/;"	m	struct:ieee80211_hdr_3addrqos
frame_ctl	ieee80211.h	/^	__le16 frame_ctl;$/;"	m	struct:ieee80211_hdr_4addr
frame_ctl	ieee80211.h	/^	__le16 frame_ctl;$/;"	m	struct:ieee80211_hdr_4addrqos
frame_ctl	ieee80211.h	/^        __le16 frame_ctl;$/;"	m	struct:ieee80211_hdr
frame_ctl	ieee80211.h	/^        __le16 frame_ctl;$/;"	m	struct:ieee80211_hdr_1addr
frame_ctl	ieee80211.h	/^        __le16 frame_ctl;$/;"	m	struct:ieee80211_hdr_2addr
frameqos	ieee80211.h	/^}frameqos,*pframeqos;$/;"	t	typeref:union:_frameqos
framesync	r8192U.h	/^	u8	framesync;$/;"	m	struct:r8192_priv
framesyncC34	r8192U.h	/^	u32 	framesyncC34;$/;"	m	struct:r8192_priv
framesyncMonitor	r8192U.h	/^	u8   	framesyncMonitor;$/;"	m	struct:r8192_priv
free_ieee80211	ieee80211.h	274;"	d
freq	ieee80211.h	/^	u8 freq;$/;"	m	struct:ieee80211_rx_stats
freq_band	ieee80211.h	/^	int freq_band;  \/* 2.4Ghz, 5.2Ghz, Mixed *\/$/;"	m	struct:ieee80211_device
fsync_firstdiff_ratethreshold	ieee80211.h	/^	u32	fsync_firstdiff_ratethreshold;		\/\/ low threshold$/;"	m	struct:ieee80211_device
fsync_multiple_timeinterval	ieee80211.h	/^	u8	fsync_multiple_timeinterval;		\/\/ FsyncMultipleTimeInterval * FsyncTimeInterval	 $/;"	m	struct:ieee80211_device
fsync_rate_bitmap	ieee80211.h	/^	u32	fsync_rate_bitmap;$/;"	m	struct:ieee80211_device
fsync_rssi_threshold	ieee80211.h	/^	u8	fsync_rssi_threshold;$/;"	m	struct:ieee80211_device
fsync_seconddiff_ratethreshold	ieee80211.h	/^	u32	fsync_seconddiff_ratethreshold;	 \/\/ decrease threshold$/;"	m	struct:ieee80211_device
fsync_state	ieee80211.h	/^	Fsync_State			fsync_state;$/;"	m	struct:ieee80211_device
fsync_time_interval	ieee80211.h	/^	u32 	fsync_time_interval;$/;"	m	struct:ieee80211_device
fsync_timer	r8192U.h	/^	struct timer_list fsync_timer;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::timer_list
fts	ieee80211.h	/^	u16 fts; \/* Fragmentation Threshold *\/$/;"	m	struct:ieee80211_device
fwSendNullPacket	r819xU_firmware.c	/^fwSendNullPacket($/;"	f
fw_download_code	r819xU_firmware.c	/^bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, u32 buffer_len)$/;"	f
fw_seg_container	r8192U.h	/^}fw_seg_container, *pfw_seg_container;$/;"	t	typeref:struct:_rt_firmare_seg_container
get_key	ieee80211_crypt.h	/^	int (*get_key)(void *key, int len, u8 *seq, void *priv);$/;"	m	struct:ieee80211_crypto_ops
get_rxpacket_shiftbytes_819xusb	r8192U_core.c	/^u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)$/;"	f
hal_dm_watchdog	r8192U_dm.c	/^extern void hal_dm_watchdog(struct work_struct *work)$/;"	f
handle_assoc_response	ieee80211.h	/^        int (*handle_assoc_response) (struct net_device * dev, struct ieee80211_assoc_response_frame * resp, struct ieee80211_network * network);$/;"	m	struct:ieee80211_device
handle_beacon	ieee80211.h	/^        int (*handle_beacon) (struct net_device * dev, struct ieee80211_beacon * beacon, struct ieee80211_network * network);$/;"	m	struct:ieee80211_device
handle_management	ieee80211.h	/^        int (*handle_management) (struct net_device * dev,$/;"	m	struct:ieee80211_device
hard_start_xmit	ieee80211.h	/^	int (*hard_start_xmit)(struct ieee80211_txb *txb,$/;"	m	struct:ieee80211_device
head	r8192U.h	/^        } head;$/;"	m	struct:rtl_reg_debug	typeref:struct:rtl_reg_debug::__anon14
header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_assoc_request_frame	typeref:struct:ieee80211_assoc_request_frame::ieee80211_hdr_3addr
header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_assoc_response_frame	typeref:struct:ieee80211_assoc_response_frame::ieee80211_hdr_3addr
header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_authentication	typeref:struct:ieee80211_authentication::ieee80211_hdr_3addr
header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_probe_request	typeref:struct:ieee80211_probe_request::ieee80211_hdr_3addr
header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_probe_response	typeref:struct:ieee80211_probe_response::ieee80211_hdr_3addr
header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_reassoc_request_frame	typeref:struct:ieee80211_reassoc_request_frame::ieee80211_hdr_3addr
header	ieee80211.h	/^        struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_disassoc	typeref:struct:ieee80211_disassoc::ieee80211_hdr_3addr
high2low_rssi_thresh_for_ra	r8192U.h	/^	u32				high2low_rssi_thresh_for_ra;$/;"	m	struct:_rate_adaptive
high_rssi_thresh_for_ra	r8192U.h	/^	u32				high_rssi_thresh_for_ra;$/;"	m	struct:_rate_adaptive
host_build_iv	ieee80211.h	/^        int host_build_iv;$/;"	m	struct:ieee80211_device
host_decrypt	ieee80211.h	/^	int host_decrypt;$/;"	m	struct:ieee80211_device
host_encrypt	ieee80211.h	/^	int host_encrypt;$/;"	m	struct:ieee80211_device
host_encrypt_msdu	ieee80211.h	/^	int host_encrypt_msdu;$/;"	m	struct:ieee80211_device
host_mc_decrypt	ieee80211.h	/^        int host_mc_decrypt;$/;"	m	struct:ieee80211_device
host_open_frag	ieee80211.h	/^        int host_open_frag;$/;"	m	struct:ieee80211_device
host_strip_iv_icv	ieee80211.h	/^        int host_strip_iv_icv;$/;"	m	struct:ieee80211_device
ht_cap_buf	ieee80211.h	/^	u8					ht_cap_buf[32];$/;"	m	struct:_bss_ht
ht_cap_len	ieee80211.h	/^	u16					ht_cap_len;$/;"	m	struct:_bss_ht
ht_info_buf	ieee80211.h	/^	u8					ht_info_buf[32];$/;"	m	struct:_bss_ht
ht_info_len	ieee80211.h	/^	u16					ht_info_len;$/;"	m	struct:_bss_ht
ht_mcs	r8192U.h	/^	u32             ht_mcs[4][16];$/;"	m	struct:_rt_9x_tx_rate_history
ht_mcs	r819xU_cmdpkt.h	/^	u16	ht_mcs[4][16];$/;"	m	struct:tag_tx_rate_history
ht_spec_ver	ieee80211.h	/^	HT_SPEC_VER			ht_spec_ver;$/;"	m	struct:_bss_ht
hw_header	ieee80211.h	/^	unsigned int hw_header;$/;"	m	struct:ieee80211_device
hw_plcp_len	r8192U.h	/^	short hw_plcp_len;$/;"	m	struct:r8192_priv
hwsec_active	ieee80211.h	/^	u8 hwsec_active;  \/\/hw security active.$/;"	m	struct:ieee80211_device
hwsec_support	ieee80211.h	/^	u8 hwsec_support; \/\/support?$/;"	m	struct:ieee80211_device
ibss_mac_hash	ieee80211.h	/^	struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
id	ieee80211.h	/^	u8 id;$/;"	m	struct:ieee80211_info_element
id	ieee80211.h	/^	u8 id;$/;"	m	struct:ieee80211_info_element_hdr
idx	ieee80211.h	/^			u8 idx;$/;"	m	struct:ieee_param::__anon2::__anon6
idx	r8192U.h	/^			u8 idx;$/;"	m	struct:ipw_param::__anon9::__anon13
ieee80211	r8192U.h	/^	struct ieee80211_device *ieee80211;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::ieee80211_device
ieee80211-r8180-objs	Makefile	/^ieee80211-r8180-objs := ieee80211.o ieee80211_rx.o ieee80211_tx.o ieee80211_wx.o ieee80211_module.o$/;"	m
ieee80211_assoc_request_frame	ieee80211.h	/^struct ieee80211_assoc_request_frame {$/;"	s
ieee80211_assoc_response_frame	ieee80211.h	/^struct ieee80211_assoc_response_frame {$/;"	s
ieee80211_authentication	ieee80211.h	/^struct ieee80211_authentication {$/;"	s
ieee80211_beacon	ieee80211.h	1105;"	d
ieee80211_crypt_data	ieee80211_crypt.h	/^struct ieee80211_crypt_data {$/;"	s
ieee80211_crypto_ops	ieee80211_crypt.h	/^struct ieee80211_crypto_ops {$/;"	s
ieee80211_device	ieee80211.h	/^struct ieee80211_device {$/;"	s
ieee80211_disassoc	ieee80211.h	/^struct ieee80211_disassoc {$/;"	s
ieee80211_drv_agg_txb	ieee80211.h	/^struct ieee80211_drv_agg_txb {$/;"	s
ieee80211_frag_entry	ieee80211.h	/^struct ieee80211_frag_entry {$/;"	s
ieee80211_get_hdrlen	ieee80211.h	/^extern inline int ieee80211_get_hdrlen(u16 fc)$/;"	f
ieee80211_get_payload	ieee80211.h	/^static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr)$/;"	f
ieee80211_get_scans	ieee80211.h	/^extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)$/;"	f
ieee80211_hdr	ieee80211.h	/^struct ieee80211_hdr {$/;"	s
ieee80211_hdr_1addr	ieee80211.h	/^struct ieee80211_hdr_1addr {$/;"	s
ieee80211_hdr_2addr	ieee80211.h	/^struct ieee80211_hdr_2addr {$/;"	s
ieee80211_hdr_3addr	ieee80211.h	/^struct ieee80211_hdr_3addr {$/;"	s
ieee80211_hdr_3addrqos	ieee80211.h	/^struct ieee80211_hdr_3addrqos {$/;"	s
ieee80211_hdr_4addr	ieee80211.h	/^struct ieee80211_hdr_4addr {$/;"	s
ieee80211_hdr_4addrqos	ieee80211.h	/^struct ieee80211_hdr_4addrqos {$/;"	s
ieee80211_increment_scans	ieee80211.h	/^extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)$/;"	f
ieee80211_info_element	ieee80211.h	/^struct ieee80211_info_element {$/;"	s
ieee80211_info_element_hdr	ieee80211.h	/^struct ieee80211_info_element_hdr {$/;"	s
ieee80211_is_cck_rate	ieee80211.h	/^static inline int ieee80211_is_cck_rate(u8 rate)$/;"	f
ieee80211_is_empty_essid	ieee80211.h	/^extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)$/;"	f
ieee80211_is_ofdm_rate	ieee80211.h	/^static inline int ieee80211_is_ofdm_rate(u8 rate)$/;"	f
ieee80211_is_valid_mode	ieee80211.h	/^extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)$/;"	f
ieee80211_mfie	ieee80211.h	/^enum ieee80211_mfie {$/;"	g
ieee80211_network	ieee80211.h	/^struct ieee80211_network {$/;"	s
ieee80211_priv	ieee80211.h	/^extern inline void *ieee80211_priv(struct net_device *dev)$/;"	f
ieee80211_probe_request	ieee80211.h	/^struct ieee80211_probe_request {$/;"	s
ieee80211_probe_response	ieee80211.h	/^struct ieee80211_probe_response {$/;"	s
ieee80211_qos_ac_parameter	ieee80211.h	/^struct ieee80211_qos_ac_parameter {$/;"	s
ieee80211_qos_data	ieee80211.h	/^struct ieee80211_qos_data {$/;"	s
ieee80211_qos_information_element	ieee80211.h	/^struct ieee80211_qos_information_element {$/;"	s
ieee80211_qos_parameter_info	ieee80211.h	/^struct ieee80211_qos_parameter_info {$/;"	s
ieee80211_qos_parameters	ieee80211.h	/^struct ieee80211_qos_parameters {$/;"	s
ieee80211_reasoncode	ieee80211.h	/^enum ieee80211_reasoncode {$/;"	g
ieee80211_reassoc_request_frame	ieee80211.h	/^struct ieee80211_reassoc_request_frame {$/;"	s
ieee80211_rx	ieee80211.h	278;"	d
ieee80211_rx_stats	ieee80211.h	/^struct ieee80211_rx_stats {$/;"	s
ieee80211_rxb	ieee80211.h	/^struct ieee80211_rxb {$/;"	s
ieee80211_security	ieee80211.h	/^struct ieee80211_security {$/;"	s
ieee80211_snap_hdr	ieee80211.h	/^struct ieee80211_snap_hdr {$/;"	s
ieee80211_softmac_stats	ieee80211.h	/^struct ieee80211_softmac_stats{$/;"	s
ieee80211_state	ieee80211.h	/^enum ieee80211_state {$/;"	g
ieee80211_stats	ieee80211.h	/^struct ieee80211_stats {$/;"	s
ieee80211_statuscode	ieee80211.h	/^enum ieee80211_statuscode {$/;"	g
ieee80211_tim_parameters	ieee80211.h	/^struct ieee80211_tim_parameters {$/;"	s
ieee80211_txb	ieee80211.h	/^struct ieee80211_txb {$/;"	s
ieee80211_wake_queue	ieee80211.h	280;"	d
ieee80211_wmm_ac_param	ieee80211.h	/^struct ieee80211_wmm_ac_param {$/;"	s
ieee80211_wmm_ts_info	ieee80211.h	/^struct ieee80211_wmm_ts_info {$/;"	s
ieee80211_wmm_tspec_elem	ieee80211.h	/^struct ieee80211_wmm_tspec_elem {$/;"	s
ieee80211_wx_get_encode	ieee80211.h	270;"	d
ieee80211_wx_get_name	ieee80211.h	273;"	d
ieee80211_wx_get_scan	ieee80211.h	268;"	d
ieee80211_wx_set_auth	ieee80211.h	279;"	d
ieee80211_wx_set_encode	ieee80211.h	269;"	d
ieee802_1x	ieee80211.h	/^	int ieee802_1x; \/* is IEEE 802.1X used *\/$/;"	m	struct:ieee80211_device
ieee_ibss_seq	ieee80211.h	/^struct ieee_ibss_seq {$/;"	s
ieee_param	ieee80211.h	/^typedef struct ieee_param {$/;"	s
ieee_param	ieee80211.h	/^}ieee_param;$/;"	t	typeref:struct:ieee_param
ieee_stats	ieee80211.h	/^	struct ieee80211_stats ieee_stats;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_stats
ieeerate2rtlrate	r8192U_core.c	/^inline u16 ieeerate2rtlrate(int rate)$/;"	f
ifname	r8192U_core.c	/^static char* ifname = "wlan%d";$/;"	v	file:
inact_inter	ieee80211.h	/^	u32 inact_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
inactivity	ieee80211.h	/^	inactivity		= 0x4,$/;"	e	enum:_ReasonCode
index	r8192U.h	/^	u32     index;                  \/\/index to current array to store$/;"	m	struct:_RT_SMOOTH_DATA_4RF
info_element	ieee80211.h	/^	struct ieee80211_info_element info_element[0]; \/* supported rates *\/$/;"	m	struct:ieee80211_assoc_response_frame	typeref:struct:ieee80211_assoc_response_frame::ieee80211_info_element
info_element	ieee80211.h	/^	struct ieee80211_info_element info_element[0];$/;"	m	struct:ieee80211_authentication	typeref:struct:ieee80211_authentication::ieee80211_info_element
info_element	ieee80211.h	/^        struct ieee80211_info_element info_element[0];$/;"	m	struct:ieee80211_assoc_request_frame	typeref:struct:ieee80211_assoc_request_frame::ieee80211_info_element
info_element	ieee80211.h	/^        struct ieee80211_info_element info_element[0];$/;"	m	struct:ieee80211_probe_request	typeref:struct:ieee80211_probe_request::ieee80211_info_element
info_element	ieee80211.h	/^        struct ieee80211_info_element info_element[0];$/;"	m	struct:ieee80211_probe_response	typeref:struct:ieee80211_probe_response::ieee80211_info_element
info_element	ieee80211.h	/^        struct ieee80211_info_element info_element[0];$/;"	m	struct:ieee80211_reassoc_request_frame	typeref:struct:ieee80211_reassoc_request_frame::ieee80211_info_element
info_element	ieee80211.h	/^        struct ieee80211_qos_information_element info_element;$/;"	m	struct:ieee80211_qos_parameter_info	typeref:struct:ieee80211_qos_parameter_info::ieee80211_qos_information_element
init	ieee80211_crypt.h	/^	void * (*init)(int keyidx);$/;"	m	struct:ieee80211_crypto_ops
init_firmware	r819xU_firmware.c	/^bool init_firmware(struct net_device *dev)$/;"	f
init_gain	r8192U.h	/^} init_gain, *pinit_gain;$/;"	t	typeref:struct:_init_gain
init_hal_dm	r8192U_dm.c	/^init_hal_dm(struct net_device *dev)$/;"	f
init_rate_adaptive	r8192U_dm.c	/^extern void init_rate_adaptive(struct net_device * dev)	$/;"	f
init_wmmparam_flag	ieee80211.h	/^	char init_wmmparam_flag;$/;"	m	struct:ieee80211_device
initgain_backup	r8192U.h	/^	init_gain initgain_backup;$/;"	m	struct:r8192_priv
initialgain_lowerbound_state	r8192U_dm.h	/^	bool		initialgain_lowerbound_state;$/;"	m	struct:_dynamic_initial_gain_threshold_
interrupt_status	r819xU_cmdpkt.h	/^	u32	interrupt_status;				\/* Interrupt Status. *\/	$/;"	m	struct:tag_cmd_pkt_interrupt_status
invalid_AKMP	ieee80211.h	/^	invalid_AKMP	= 0x14,$/;"	e	enum:_ReasonCode
invalid_Gcipher	ieee80211.h	/^	invalid_Gcipher = 0x12,$/;"	e	enum:_ReasonCode
invalid_IE	ieee80211.h	/^	invalid_IE		= 0x0d,$/;"	e	enum:_ReasonCode
invalid_Pcipher	ieee80211.h	/^	invalid_Pcipher = 0x13,$/;"	e	enum:_ReasonCode
invalid_RSNIE	ieee80211.h	/^	invalid_RSNIE	= 0x16,$/;"	e	enum:_ReasonCode
invalid_param	ieee80211.h	/^	invalid_param	= 0x26, \/\/ 38$/;"	e	enum:_ReasonCode
ipw_param	r8192U.h	/^struct ipw_param {$/;"	s
irq	r8192U.h	/^	int irq;$/;"	m	struct:r8192_priv
irq_lock	r8192U.h	/^	spinlock_t irq_lock;$/;"	m	struct:r8192_priv
irq_mask	r8192U.h	/^	u16 irq_mask;$/;"	m	struct:r8192_priv
irq_rx_tasklet	r8192U.h	/^	struct tasklet_struct irq_rx_tasklet;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::tasklet_struct
irt_counter	r8192U.h	/^	atomic_t irt_counter;\/\/count for irq_rx_tasklet$/;"	m	struct:r8192_priv
is_broadcast_ether_addr	ieee80211.h	/^extern inline int is_broadcast_ether_addr(const u8 *addr)$/;"	f
is_multicast_ether_addr	ieee80211.h	/^extern inline int is_multicast_ether_addr(const u8 *addr)$/;"	f
is_qos_active	ieee80211.h	/^        int (*is_qos_active) (struct net_device *dev, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
is_queue_full	ieee80211.h	/^        int (*is_queue_full) (struct net_device * dev, int pri);$/;"	m	struct:ieee80211_device
iw_mode	ieee80211.h	/^	int iw_mode; \/* operating mode (IW_MODE_*) *\/$/;"	m	struct:ieee80211_device
key	ieee80211.h	/^			u8 key[0];$/;"	m	struct:ieee_param::__anon2::__anon6
key	r8192U.h	/^			u8 key[0];$/;"	m	struct:ipw_param::__anon9::__anon13
key_len	ieee80211.h	/^			u16 key_len;$/;"	m	struct:ieee_param::__anon2::__anon6
key_len	r8192U.h	/^			u16 key_len;$/;"	m	struct:ipw_param::__anon9::__anon13
key_sizes	ieee80211.h	/^	u8 key_sizes[WEP_KEYS];$/;"	m	struct:ieee80211_security
keys	ieee80211.h	/^	u8 keys[WEP_KEYS][SCM_KEY_LEN];$/;"	m	struct:ieee80211_security
last_associate	ieee80211.h	/^	u32 last_associate;$/;"	m	struct:ieee80211_network
last_dtim_sta_time	ieee80211.h	/^	u32 last_dtim_sta_time[2];$/;"	m	struct:ieee80211_network
last_frag	ieee80211.h	/^	unsigned int last_frag;$/;"	m	struct:ieee80211_frag_entry
last_packet_rate	r8192U.h	/^	u8	      last_packet_rate;$/;"	m	struct:Stats
last_packet_time	ieee80211.h	/^	unsigned long last_packet_time[17];$/;"	m	struct:ieee80211_device
last_ratr	r8192U.h	/^	u32				last_ratr;$/;"	m	struct:_rate_adaptive
last_rx_ps_time	ieee80211.h	/^	unsigned long last_rx_ps_time;$/;"	m	struct:ieee80211_device
last_rxfrag_num	ieee80211.h	/^	u16 last_rxfrag_num[17];\/* tx frag previous per-tid *\/$/;"	m	struct:ieee80211_device
last_rxseq_num	ieee80211.h	/^	u16 last_rxseq_num[17]; \/* rx seq previous per-tid *\/$/;"	m	struct:ieee80211_device
last_scanned	ieee80211.h	/^	unsigned long last_scanned;$/;"	m	struct:ieee80211_network
last_signal_strength_inpercent	r8192U.h	/^	long last_signal_strength_inpercent;$/;"	m	struct:Stats
len	ieee80211.h	/^			u32 len;$/;"	m	struct:ieee_param::__anon2::__anon4
len	ieee80211.h	/^	u16 len;$/;"	m	struct:ieee80211_rx_stats
len	ieee80211.h	/^	u8 len;$/;"	m	struct:ieee80211_info_element
len	ieee80211.h	/^	u8 len;$/;"	m	struct:ieee80211_info_element_hdr
len	r8192U.h	/^			u32 len;$/;"	m	struct:ipw_param::__anon9::__anon11
length	ieee80211.h	/^	u16 length;$/;"	m	struct:eapol
length	ieee80211.h	/^        u8 length;$/;"	m	struct:ieee80211_qos_information_element
length	r8192U.h	/^                unsigned char length;$/;"	m	struct:rtl_reg_debug::__anon14
length	r819xU_cmdpkt.h	/^	u8	length;				\/* Command packet length. *\/$/;"	m	struct:tag_cmd_pkt_interrupt_status
length	r819xU_cmdpkt.h	/^	u8	length;				\/* Command packet length. *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
length	r819xU_cmdpkt.h	/^	u8	length;				\/* Command packet length. *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
length	r819xU_cmdpkt.h	/^	u8 	length;				\/\/ Command packet length$/;"	m	struct:tag_rx_debug_message_feedback
length	r819xU_cmdpkt.h	/^	u8 	length;				\/\/ Command packet length$/;"	m	struct:tag_tx_rate_history
length	r819xU_cmdpkt.h	/^	u8 	length;				\/\/ Command packet length$/;"	m	struct:tag_tx_stats_feedback
level	ieee80211.h	/^	u8 level;$/;"	m	struct:ieee80211_security
link_change	ieee80211.h	/^	void (*link_change)(struct net_device *dev);$/;"	m	struct:ieee80211_device
list	ieee80211.h	/^	struct list_head list;$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::list_head
list	ieee80211.h	/^	struct list_head list;$/;"	m	struct:ieee_ibss_seq	typeref:struct:ieee_ibss_seq::list_head
list	ieee80211_crypt.h	/^	struct list_head list; \/* delayed deletion list *\/$/;"	m	struct:ieee80211_crypt_data	typeref:struct:ieee80211_crypt_data::list_head
listen_interval	ieee80211.h	/^	__le16 listen_interval;$/;"	m	struct:ieee80211_assoc_request_frame
listen_interval	ieee80211.h	/^	__le16 listen_interval;$/;"	m	struct:ieee80211_reassoc_request_frame
listen_interval	ieee80211.h	/^	u16 listen_interval;$/;"	m	struct:ieee80211_network
lock	ieee80211.h	/^	spinlock_t lock;$/;"	m	struct:ieee80211_device
long_slot_time	ieee80211.h	/^	bool				long_slot_time;$/;"	m	struct:_bss_ht
low2high_rssi_thresh_for_ra20M	r8192U.h	/^	u8				low2high_rssi_thresh_for_ra20M;$/;"	m	struct:_rate_adaptive
low2high_rssi_thresh_for_ra40M	r8192U.h	/^	u8				low2high_rssi_thresh_for_ra40M;$/;"	m	struct:_rate_adaptive
low_rssi_thresh_for_ra20M	r8192U.h	/^	u32				low_rssi_thresh_for_ra20M;$/;"	m	struct:_rate_adaptive
low_rssi_thresh_for_ra40M	r8192U.h	/^	u32				low_rssi_thresh_for_ra40M;$/;"	m	struct:_rate_adaptive
low_rssi_threshold_ratr	r8192U.h	/^	u32				low_rssi_threshold_ratr;$/;"	m	struct:_rate_adaptive
low_rssi_threshold_ratr_20M	r8192U.h	/^	u32				low_rssi_threshold_ratr_20M;$/;"	m	struct:_rate_adaptive
low_rssi_threshold_ratr_40M	r8192U.h	/^	u32				low_rssi_threshold_ratr_40M;$/;"	m	struct:_rate_adaptive
mac	ieee80211.h	/^	u8 mac[ETH_ALEN];$/;"	m	struct:ieee_ibss_seq
mac_time	ieee80211.h	/^	u32 mac_time[2];$/;"	m	struct:ieee80211_rx_stats
mask	ieee80211.h	/^	u8 mask;$/;"	m	struct:ieee80211_rx_stats
mask	r819xU_cmdpkt.h	/^	u32	mask;				\/* *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
max_burst_size	ieee80211.h	/^	u32 max_burst_size;$/;"	m	struct:ieee80211_wmm_tspec_elem
max_ex_pwr	r8192U.h	/^	u8	max_ex_pwr;$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
max_msdu_size	ieee80211.h	/^	u16 max_msdu_size;$/;"	m	struct:ieee80211_wmm_tspec_elem
max_sens	r8192U.h	/^	short max_sens;$/;"	m	struct:r8192_priv
max_serv_inter	ieee80211.h	/^	u32 max_serv_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
mean_data_rate	ieee80211.h	/^	u32 mean_data_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
medium_time	ieee80211.h	/^	u16 medium_time;$/;"	m	struct:ieee80211_wmm_tspec_elem
mgmt_queue_head	ieee80211.h	/^	int mgmt_queue_head;$/;"	m	struct:ieee80211_device
mgmt_queue_ring	ieee80211.h	/^	struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::sk_buff
mgmt_queue_tail	ieee80211.h	/^	int mgmt_queue_tail;$/;"	m	struct:ieee80211_device
mgmt_tx_lock	ieee80211.h	/^	spinlock_t mgmt_tx_lock;	$/;"	m	struct:ieee80211_device
mic_failure	ieee80211.h	/^	mic_failure 	= 0xe,$/;"	e	enum:_ReasonCode
middle_rssi_threshold_ratr	r8192U.h	/^	u32				middle_rssi_threshold_ratr;$/;"	m	struct:_rate_adaptive
min_data_rate	ieee80211.h	/^	u32 min_data_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
min_phy_rate	ieee80211.h	/^	u32 min_phy_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
min_serv_inter	ieee80211.h	/^	u32 min_serv_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
mlme	ieee80211.h	/^		} mlme;$/;"	m	union:ieee_param::__anon2	typeref:struct:ieee_param::__anon2::__anon5
mlme	r8192U.h	/^		} mlme;$/;"	m	union:ipw_param::__anon9	typeref:struct:ipw_param::__anon9::__anon12
mode	ieee80211.h	/^	int mode;       \/* A, B, G *\/$/;"	m	struct:ieee80211_device
mode	ieee80211.h	/^	u8  mode;$/;"	m	struct:ieee80211_network
modulation	ieee80211.h	/^	int modulation; \/* CCK, OFDM *\/$/;"	m	struct:ieee80211_device
msDelay	r819xU_phy.h	/^	u32			msDelay;$/;"	m	struct:_SwChnlCmd
msleep_interruptible_rtl	ieee80211.h	/^static inline unsigned long msleep_interruptible_rtl(unsigned int msecs)$/;"	f
msleep_interruptible_rtl	ieee80211.h	347;"	d
mutex	r8192U.h	/^        struct mutex mutex;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::mutex
nAMSDU_MaxSize	r819xU_HTType.h	/^	u16				nAMSDU_MaxSize;			\/\/ This indicates Tx A-MSDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
nCur40MhzPrimeSC	r8192U.h	/^	u8	nCur40MhzPrimeSC;	\/\/ Control channel sub-carrier$/;"	m	struct:r8192_priv
nCurrent_AMSDU_MaxSize	r819xU_HTType.h	/^	u16				nCurrent_AMSDU_MaxSize;	\/\/ This indicates Tx A-MSDU capability$/;"	m	struct:_RT_HIGH_THROUGHPUT
name	ieee80211.h	/^			u8 name;$/;"	m	struct:ieee_param::__anon2::__anon3
name	ieee80211_crypt.h	/^	const char *name;$/;"	m	struct:ieee80211_crypto_ops
name	r8192U.h	/^			u8 name;$/;"	m	struct:ipw_param::__anon9::__anon10
name	r8192U.h	/^       	u8 name[IW_ESSID_MAX_SIZE + 1];$/;"	m	struct:ssid_thread
network_free_list	ieee80211.h	/^	struct list_head network_free_list;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
network_list	ieee80211.h	/^	struct list_head network_list;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
networks	ieee80211.h	/^	struct ieee80211_network *networks;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_network
next	r8192U.h	/^	struct buffer *next;$/;"	m	struct:buffer	typeref:struct:buffer::buffer
nic_t	r8192U.h	/^	} nic_t;$/;"	t	typeref:enum:__anon16
nic_type	ieee80211.h	/^	u8 nic_type;$/;"	m	struct:ieee80211_rx_stats
no_ass_rs	ieee80211.h	/^	unsigned int no_ass_rs;$/;"	m	struct:ieee80211_softmac_stats
no_auth_rs	ieee80211.h	/^	unsigned int no_auth_rs;$/;"	m	struct:ieee80211_softmac_stats
no_facility	ieee80211.h	/^	no_facility 	= 0x23, \/\/ 35$/;"	e	enum:_ReasonCode
noise	ieee80211.h	/^	u8 noise;$/;"	m	struct:ieee80211_rx_stats
norm_msdu_size	ieee80211.h	/^	u16 norm_msdu_size;$/;"	m	struct:ieee80211_wmm_tspec_elem
nr_drv_agg_frames	ieee80211.h	/^	u8 nr_drv_agg_frames;$/;"	m	struct:ieee80211_drv_agg_txb
nr_frags	ieee80211.h	/^	u8 nr_frags;$/;"	m	struct:ieee80211_txb
nr_subframes	ieee80211.h	/^	u8 nr_subframes;$/;"	m	struct:ieee80211_rxb
nrxAMPDU_aggr_num	r8192U.h	/^	u8 	nrxAMPDU_aggr_num;$/;"	m	struct:r8192_priv
nrxAMPDU_size	r8192U.h	/^	u16 	nrxAMPDU_size;$/;"	m	struct:r8192_priv
ntotalfrag	ieee80211.h	/^	u16          ntotalfrag;$/;"	m	struct:ieee80211_rx_stats
num_process_phyinfo	r8192U.h	/^	unsigned long num_process_phyinfo;		\/\/ debug use only.$/;"	m	struct:Stats
numpacket_matchbssid	r8192U.h	/^	unsigned long numpacket_matchbssid;	\/\/ debug use only.$/;"	m	struct:Stats
numpacket_toself	r8192U.h	/^	unsigned long numpacket_toself;		\/\/ debug use only.$/;"	m	struct:Stats
numqry_phystatus	r8192U.h	/^	unsigned long numqry_phystatus;$/;"	m	struct:Stats
numqry_phystatusCCK	r8192U.h	/^	unsigned long numqry_phystatusCCK;$/;"	m	struct:Stats
numqry_phystatusHT	r8192U.h	/^	unsigned long numqry_phystatusHT;$/;"	m	struct:Stats
obj-m	Makefile	/^obj-m := r8192_usb.o$/;"	m
ofdm	r8192U.h	/^	u32             ofdm[8];$/;"	m	struct:_rt_9x_tx_rate_history
ofdm	r819xU_cmdpkt.h	/^	u16 	ofdm[8];$/;"	m	struct:tag_tx_rate_history
old_param_count	ieee80211.h	/^        u8 old_param_count;$/;"	m	struct:ieee80211_qos_data
oldaddr	r8192U.h	/^	u32 *oldaddr;$/;"	m	struct:r8192_priv
open_wep	ieee80211.h	/^	int open_wep; \/* Set to 1 to allow unencrypted frames *\/$/;"	m	struct:ieee80211_device
ops	ieee80211_crypt.h	/^	struct ieee80211_crypto_ops *ops;$/;"	m	struct:ieee80211_crypt_data	typeref:struct:ieee80211_crypt_data::ieee80211_crypto_ops
opt_rst_type_e	r819xU_firmware.h	/^}opt_rst_type_e;$/;"	t	typeref:enum:_opt_rst_type
oui	ieee80211.h	/^        u8    oui[P80211_OUI_LEN];    \/* organizational universal id *\/$/;"	m	struct:ieee80211_snap_hdr
out_pipe	r8192U.h	/^	u8 out_pipe;$/;"	m	struct:rtl8192_rx_info
owner	ieee80211_crypt.h	/^	struct module *owner;$/;"	m	struct:ieee80211_crypto_ops	typeref:struct:ieee80211_crypto_ops::module
pFirmware	r8192U.h	/^	prt_firmware		pFirmware;$/;"	m	struct:r8192_priv
pHTInfo	ieee80211.h	/^	PRT_HIGH_THROUGHPUT	pHTInfo;$/;"	m	struct:ieee80211_device
packet_time	ieee80211.h	/^	unsigned long packet_time[17];$/;"	m	struct:ieee_ibss_seq
packetlength	ieee80211.h	/^	u16          packetlength;              \/\/ Total packet length: Must equal to sum of all FragLength$/;"	m	struct:ieee80211_rx_stats
page	r8192U.h	/^                unsigned char page;$/;"	m	struct:rtl_reg_debug::__anon14
pairwise_key_type	ieee80211.h	/^	u16 pairwise_key_type;$/;"	m	struct:ieee80211_device
param_count	ieee80211.h	/^        u8 param_count;$/;"	m	struct:ieee80211_qos_data
parameters	ieee80211.h	/^        struct ieee80211_qos_parameters parameters;$/;"	m	struct:ieee80211_qos_data	typeref:struct:ieee80211_qos_data::ieee80211_qos_parameters
payload	ieee80211.h	/^        u8 payload[0];$/;"	m	struct:ieee80211_hdr
payload	ieee80211.h	/^        u8 payload[0];$/;"	m	struct:ieee80211_hdr_1addr
payload	ieee80211.h	/^        u8 payload[0];$/;"	m	struct:ieee80211_hdr_2addr
payload	ieee80211.h	/^        u8 payload[0];$/;"	m	struct:ieee80211_hdr_3addr
payload	ieee80211.h	/^        u8 payload[0];$/;"	m	struct:ieee80211_hdr_3addrqos
payload	ieee80211.h	/^        u8 payload[0];$/;"	m	struct:ieee80211_hdr_4addr
payload	ieee80211.h	/^        u8 payload[0];$/;"	m	struct:ieee80211_hdr_4addrqos
payload_size	ieee80211.h	/^	__le16 payload_size;$/;"	m	struct:ieee80211_txb
pbandwidth_autoswitch	ieee80211.h	/^}bandwidth_autoswitch,*pbandwidth_autoswitch;$/;"	t	typeref:struct:_bandwidth_autoswitch
pbss_ht	ieee80211.h	/^}bss_ht, *pbss_ht;$/;"	t	typeref:struct:_bss_ht
pcb_desc	ieee80211.h	/^}cb_desc, *pcb_desc;$/;"	t	typeref:struct:cb_desc
pccktxbbgain_struct	r8192U.h	/^} ccktxbbgain_struct,*pccktxbbgain_struct;$/;"	t	typeref:struct:_ccktxbbgain_struct
pdsnr_X	r8192U.h	/^	u8	pdsnr_X[2];$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
peak_data_rate	ieee80211.h	/^	u32 peak_data_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
perfect_rssi	ieee80211.h	/^        int perfect_rssi;$/;"	m	struct:ieee80211_device
pfirmware_source_e	r8192U.h	/^}firmware_source_e, *pfirmware_source_e;$/;"	t	typeref:enum:_firmware_source
pframeqos	ieee80211.h	/^}frameqos,*pframeqos;$/;"	t	typeref:union:_frameqos
pfw_seg_container	r8192U.h	/^}fw_seg_container, *pfw_seg_container;$/;"	t	typeref:struct:_rt_firmare_seg_container
phy_RF8256_Config_ParaFile	r8190_rtl8256.c	/^void phy_RF8256_Config_ParaFile(struct net_device* dev)$/;"	f
phy_ofdm_rx_status_rxsc_sgien_exintfflag	r8192U.h	/^}phy_ofdm_rx_status_rxsc_sgien_exintfflag;$/;"	t	typeref:struct:_phy_ofdm_rx_status_rxsc_sgien_exintfflag
phy_sts_cck_819xusb_t	r8192U.h	/^}phy_sts_cck_819xusb_t;$/;"	t	typeref:struct:_phy_cck_rx_status_report_819xusb
phy_sts_ofdm_819xusb_t	r8192U.h	/^}phy_sts_ofdm_819xusb_t;$/;"	t	typeref:struct:_phy_ofdm_rx_status_report_819xusb
ping_rssi_enable	r8192U.h	/^	u8				ping_rssi_enable;	\/\/cosa add for test$/;"	m	struct:_rate_adaptive
ping_rssi_ratr	r8192U.h	/^	u32				ping_rssi_ratr;	\/\/cosa add for test$/;"	m	struct:_rate_adaptive
ping_rssi_thresh_for_ra	r8192U.h	/^	u32				ping_rssi_thresh_for_ra;\/\/cosa add for test$/;"	m	struct:_rate_adaptive
pinit_gain	r8192U.h	/^} init_gain, *pinit_gain;$/;"	t	typeref:struct:_init_gain
pkt_id	r819xU_cmdpkt.h	/^	u16	pkt_id;				\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
pkt_length	r819xU_cmdpkt.h	/^	u16	pkt_length;			\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
pkt_size	ieee80211.h	/^	u16 pkt_size;$/;"	m	struct:cb_desc
pkt_type	r819xU_cmdpkt.h	/^	u8	pkt_type:2;		\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
plcp_preamble_mode	r8192U.h	/^	short plcp_preamble_mode;$/;"	m	struct:r8192_priv
poor_condition	ieee80211.h	/^	poor_condition	= 0x22, \/\/ 34$/;"	e	enum:_ReasonCode
pp_rxskb	r8192U.h	/^        struct sk_buff **pp_rxskb;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::sk_buff
prate_adaptive	r8192U.h	/^} rate_adaptive, *prate_adaptive;$/;"	t	typeref:struct:_rate_adaptive
pre_connect_state	r8192U_dm.h	/^	u8		pre_connect_state;$/;"	m	struct:_dynamic_initial_gain_threshold_
pre_ig_value	r8192U_dm.h	/^	u32		pre_ig_value;$/;"	m	struct:_dynamic_initial_gain_threshold_
precs_ratio_state	r8192U_dm.h	/^	u8		precs_ratio_state;$/;"	m	struct:_dynamic_initial_gain_threshold_
prepd_thstate	r8192U_dm.h	/^	u8		prepd_thstate;$/;"	m	struct:_dynamic_initial_gain_threshold_
prev_seq_ctl	ieee80211.h	/^        u16 prev_seq_ctl;       \/* used to drop duplicate frames *\/$/;"	m	struct:ieee80211_device
print_buffer	r8192U_core.c	/^void print_buffer(u32 *buffer, int len)$/;"	f
print_stats	ieee80211_crypt.h	/^	char * (*print_stats)(char *p, void *priv);$/;"	m	struct:ieee80211_crypto_ops
priority_t	r8192U.h	/^} priority_t;$/;"	t	typeref:enum:__anon15
priv	ieee80211.h	/^	u8 priv[0];$/;"	m	struct:ieee80211_device
priv	ieee80211_crypt.h	/^	void *priv;$/;"	m	struct:ieee80211_crypt_data
priv_wq	r8192U.h	/^	struct workqueue_struct *priv_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::workqueue_struct
privacy_invoked	ieee80211.h	/^	int privacy_invoked;$/;"	m	struct:ieee80211_device
proc_get_registers	r8192U_core.c	/^static int proc_get_registers(char *page, char **start,$/;"	f	file:
proc_get_stats_ap	r8192U_core.c	/^static int proc_get_stats_ap(char *page, char **start,$/;"	f	file:
proc_get_stats_rx	r8192U_core.c	/^static int proc_get_stats_rx(char *page, char **start,$/;"	f	file:
proc_get_stats_tx	r8192U_core.c	/^static int proc_get_stats_tx(char *page, char **start,$/;"	f	file:
promisc	r8192U.h	/^	short promisc;	$/;"	m	struct:r8192_priv
proto_started	ieee80211.h	/^	short proto_started;$/;"	m	struct:ieee80211_device
prt_firmware	r8192U.h	/^}rt_firmware, *prt_firmware;$/;"	t	typeref:struct:_rt_firmware
prt_firmware_info_819xUsb	r8192U.h	/^}rt_firmware_info_819xUsb, *prt_firmware_info_819xUsb;$/;"	t	typeref:struct:_rt_firmware_info_819xUsb
prt_status	r819xU_cmdpkt.c	/^}rt_status,*prt_status;$/;"	t	typeref:enum:_rt_status	file:
prt_tx_rahis_t	r8192U.h	/^}rt_tx_rahis_t, *prt_tx_rahis_t;$/;"	t	typeref:struct:_rt_9x_tx_rate_history
prx_desc_819x_usb	r8192U.h	/^}rx_desc_819x_usb, *prx_desc_819x_usb;$/;"	t	typeref:struct:rx_desc_819x_usb
prx_desc_819x_usb_aggr_subframe	r8192U.h	/^}rx_desc_819x_usb_aggr_subframe, *prx_desc_819x_usb_aggr_subframe;$/;"	t	typeref:struct:_rx_desc_819x_usb_aggr_subframe
prx_drvinfo_819x_usb	r8192U.h	/^}rx_drvinfo_819x_usb, *prx_drvinfo_819x_usb;$/;"	t	typeref:struct:rx_drvinfo_819x_usb
prxb	ieee80211.h	/^	struct ieee80211_rxb* prxb;$/;"	m	struct:_RX_REORDER_ENTRY	typeref:struct:_RX_REORDER_ENTRY::ieee80211_rxb
ps	ieee80211.h	/^	short ps;$/;"	m	struct:ieee80211_device
ps_is_queue_empty	ieee80211.h	/^	short (*ps_is_queue_empty) (struct net_device *dev);$/;"	m	struct:ieee80211_device
ps_request_tx_ack	ieee80211.h	/^	void (*ps_request_tx_ack) (struct net_device *dev);$/;"	m	struct:ieee80211_device
ps_task	ieee80211.h	/^	struct tasklet_struct ps_task;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tasklet_struct
ps_th	ieee80211.h	/^	u32 ps_th;$/;"	m	struct:ieee80211_device
ps_timeout	ieee80211.h	/^	int ps_timeout;$/;"	m	struct:ieee80211_device
ps_tl	ieee80211.h	/^	u32 ps_tl;$/;"	m	struct:ieee80211_device
ptx_desc_819x_usb	r8192U.h	/^}tx_desc_819x_usb, *ptx_desc_819x_usb;$/;"	t	typeref:struct:_tx_desc_819x_usb
ptx_desc_819x_usb_aggr_subframe	r8192U.h	/^}tx_desc_819x_usb_aggr_subframe, *ptx_desc_819x_usb_aggr_subframe;$/;"	t	typeref:struct:_tx_desc_819x_usb_aggr_subframe
ptx_desc_cmd_819x_usb	r8192U.h	/^}tx_desc_cmd_819x_usb, *ptx_desc_cmd_819x_usb;$/;"	t	typeref:struct:_tx_desc_cmd_819x_usb
ptx_fwinfo_819x_usb	r8192U.h	/^}tx_fwinfo_819x_usb, *ptx_fwinfo_819x_usb;$/;"	t	typeref:struct:_tx_fwinfo_819x_usb
ptxbbgain_struct	r8192U.h	/^} txbbgain_struct, *ptxbbgain_struct;$/;"	t	typeref:struct:_txbbgain_struct
pwdb_all	r8192U.h	/^	u8	pwdb_all;$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
qos_activate	r8192U.h	/^       struct work_struct qos_activate;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
qos_ctl	ieee80211.h	/^	__le16 qos_ctl;$/;"	m	struct:ieee80211_hdr_3addrqos
qos_ctl	ieee80211.h	/^	__le16 qos_ctl;$/;"	m	struct:ieee80211_hdr_4addrqos
qos_data	ieee80211.h	/^        struct ieee80211_qos_data qos_data;$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::ieee80211_qos_data
qos_pkt	r819xU_cmdpkt.h	/^	u8	qos_pkt:1;			\/* *\/	$/;"	m	struct:tag_cmd_pkt_tx_feedback
qos_support	ieee80211.h	/^	u8  qos_support;$/;"	m	struct:ieee80211_device
query_rx_cmdpkt_desc_status	r8192U_core.c	/^void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)$/;"	f
query_rxdesc_status	r8192U_core.c	/^void query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)$/;"	f
queue_index	ieee80211.h	/^	u8 queue_index;$/;"	m	struct:ieee80211_txb
queue_index	ieee80211.h	/^        u8 queue_index;$/;"	m	struct:cb_desc
queue_stop	ieee80211.h	/^	short queue_stop;$/;"	m	struct:ieee80211_device
qui	ieee80211.h	/^        u8 qui[QOS_OUI_LEN];$/;"	m	struct:ieee80211_qos_information_element
qui_subtype	ieee80211.h	/^        u8 qui_subtype;$/;"	m	struct:ieee80211_qos_information_element
qui_type	ieee80211.h	/^        u8 qui_type;$/;"	m	struct:ieee80211_qos_information_element
r8192_get_wireless_stats	r8192U_core.c	/^static struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev)$/;"	f	file:
r8192_get_wireless_stats	r8192U_wx.c	/^static struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev)$/;"	f	file:
r8192_priv	r8192U.h	/^typedef struct r8192_priv$/;"	s
r8192_priv	r8192U.h	/^}r8192_priv;$/;"	t	typeref:struct:r8192_priv
r8192_private_args	r8192U_wx.c	/^static const struct iw_priv_args r8192_private_args[] = { $/;"	v	typeref:struct:iw_priv_args	file:
r8192_private_handler	r8192U_wx.c	/^static iw_handler r8192_private_handler[] = {$/;"	v	file:
r8192_set_mac_adr	r8192U_core.c	/^int r8192_set_mac_adr(struct net_device *dev, void *mac)$/;"	f
r8192_set_multicast	r8192U_core.c	/^static void r8192_set_multicast(struct net_device *dev)$/;"	f	file:
r8192_usb-objs	Makefile	/^r8192_usb-objs := r8192U_core.o r8180_93cx6.o r8192U_wx.o r8190_rtl8256.o r819xU_phy.o r819xU_firmware.o r819xU_cmdpkt.o r8192U_dm.o$/;"	m
r8192_wx_get_ap_status	r8192U_wx.c	/^static int r8192_wx_get_ap_status(struct net_device *dev,$/;"	f	file:
r8192_wx_get_enc	r8192U_wx.c	/^static int r8192_wx_get_enc(struct net_device *dev, $/;"	f	file:
r8192_wx_get_essid	r8192U_wx.c	/^static int r8192_wx_get_essid(struct net_device *dev, $/;"	f	file:
r8192_wx_get_frag	r8192U_wx.c	/^static int r8192_wx_get_frag(struct net_device *dev, $/;"	f	file:
r8192_wx_get_freq	r8192U_wx.c	/^static int r8192_wx_get_freq(struct net_device *dev,$/;"	f	file:
r8192_wx_get_mode	r8192U_wx.c	/^static int r8192_wx_get_mode(struct net_device *dev, struct iw_request_info *a,$/;"	f	file:
r8192_wx_get_name	r8192U_wx.c	/^static int r8192_wx_get_name(struct net_device *dev, $/;"	f	file:
r8192_wx_get_rate	r8192U_wx.c	/^static int r8192_wx_get_rate(struct net_device *dev, $/;"	f	file:
r8192_wx_get_retry	r8192U_wx.c	/^static int r8192_wx_get_retry(struct net_device *dev, $/;"	f	file:
r8192_wx_get_scan	r8192U_wx.c	/^static int r8192_wx_get_scan(struct net_device *dev, struct iw_request_info *a,$/;"	f	file:
r8192_wx_get_sens	r8192U_wx.c	/^static int r8192_wx_get_sens(struct net_device *dev, $/;"	f	file:
r8192_wx_get_wap	r8192U_wx.c	/^static int r8192_wx_get_wap(struct net_device *dev, $/;"	f	file:
r8192_wx_handlers	r8192U_wx.c	/^static iw_handler r8192_wx_handlers[] =$/;"	v	file:
r8192_wx_handlers_def	r8192U_wx.c	/^struct iw_handler_def  r8192_wx_handlers_def={$/;"	v	typeref:struct:iw_handler_def
r8192_wx_read_bb	r8192U_wx.c	/^static int r8192_wx_read_bb(struct net_device *dev, $/;"	f	file:
r8192_wx_read_nicb	r8192U_wx.c	/^static int r8192_wx_read_nicb(struct net_device *dev,$/;"	f	file:
r8192_wx_read_regs	r8192U_wx.c	/^static int r8192_wx_read_regs(struct net_device *dev, $/;"	f	file:
r8192_wx_set_auth	r8192U_wx.c	/^static int r8192_wx_set_auth(struct net_device *dev,$/;"	f	file:
r8192_wx_set_crcmon	r8192U_wx.c	/^static int r8192_wx_set_crcmon(struct net_device *dev, $/;"	f	file:
r8192_wx_set_enc	r8192U_wx.c	/^static int r8192_wx_set_enc(struct net_device *dev, $/;"	f	file:
r8192_wx_set_enc_ext	r8192U_wx.c	/^static int r8192_wx_set_enc_ext(struct net_device *dev,$/;"	f	file:
r8192_wx_set_essid	r8192U_wx.c	/^static int r8192_wx_set_essid(struct net_device *dev, $/;"	f	file:
r8192_wx_set_frag	r8192U_wx.c	/^static int r8192_wx_set_frag(struct net_device *dev, $/;"	f	file:
r8192_wx_set_freq	r8192U_wx.c	/^static int r8192_wx_set_freq(struct net_device *dev, struct iw_request_info *a,$/;"	f	file:
r8192_wx_set_gen_ie	r8192U_wx.c	/^static int r8192_wx_set_gen_ie(struct net_device *dev,$/;"	f	file:
r8192_wx_set_mlme	r8192U_wx.c	/^static int r8192_wx_set_mlme(struct net_device *dev,$/;"	f	file:
r8192_wx_set_mode	r8192U_wx.c	/^static int r8192_wx_set_mode(struct net_device *dev, struct iw_request_info *a,$/;"	f	file:
r8192_wx_set_rate	r8192U_wx.c	/^static int r8192_wx_set_rate(struct net_device *dev, $/;"	f	file:
r8192_wx_set_rawtx	r8192U_wx.c	/^static int r8192_wx_set_rawtx(struct net_device *dev, $/;"	f	file:
r8192_wx_set_retry	r8192U_wx.c	/^static int r8192_wx_set_retry(struct net_device *dev, $/;"	f	file:
r8192_wx_set_scan	r8192U_wx.c	/^static int r8192_wx_set_scan(struct net_device *dev, struct iw_request_info *a,$/;"	f	file:
r8192_wx_set_scan_type	r8192U_wx.c	/^static int r8192_wx_set_scan_type(struct net_device *dev, struct iw_request_info *aa, union$/;"	f	file:
r8192_wx_set_sens	r8192U_wx.c	/^static int r8192_wx_set_sens(struct net_device *dev, $/;"	f	file:
r8192_wx_set_wap	r8192U_wx.c	/^static int r8192_wx_set_wap(struct net_device *dev,$/;"	f	file:
r8192_wx_write_bb	r8192U_wx.c	/^static int r8192_wx_write_bb(struct net_device *dev,$/;"	f	file:
r8192_wx_write_nicb	r8192U_wx.c	/^static int r8192_wx_write_nicb(struct net_device *dev,$/;"	f	file:
r8192_wx_write_regs	r8192U_wx.c	/^static int r8192_wx_write_regs(struct net_device *dev, $/;"	f	file:
rCCK0_AFESetting	r819xU_phyreg.h	90;"	d
rCCK0_CCA	r819xU_phyreg.h	91;"	d
rCCK0_DSPParameter1	r819xU_phyreg.h	95;"	d
rCCK0_DSPParameter2	r819xU_phyreg.h	96;"	d
rCCK0_DebugPort	r819xU_phyreg.h	99;"	d
rCCK0_FACounterLower	r819xU_phyreg.h	103;"	d
rCCK0_FACounterUpper	r819xU_phyreg.h	104;"	d
rCCK0_FalseAlarmReport	r819xU_phyreg.h	100;"	d
rCCK0_RxAGC1	r819xU_phyreg.h	92;"	d
rCCK0_RxAGC2	r819xU_phyreg.h	93;"	d
rCCK0_RxHP	r819xU_phyreg.h	94;"	d
rCCK0_RxReport	r819xU_phyreg.h	102;"	d
rCCK0_System	r819xU_phyreg.h	89;"	d
rCCK0_TRSSIReport	r819xU_phyreg.h	101;"	d
rCCK0_TxFilter1	r819xU_phyreg.h	97;"	d
rCCK0_TxFilter2	r819xU_phyreg.h	98;"	d
rFPGA0_AnalogParameter1	r819xU_phyreg.h	70;"	d
rFPGA0_AnalogParameter2	r819xU_phyreg.h	71;"	d
rFPGA0_AnalogParameter3	r819xU_phyreg.h	72;"	d
rFPGA0_AnalogParameter4	r819xU_phyreg.h	73;"	d
rFPGA0_PSDFunction	r819xU_phyreg.h	40;"	d
rFPGA0_PSDReport	r819xU_phyreg.h	78;"	d
rFPGA0_RFMOD	r819xU_phyreg.h	38;"	d
rFPGA0_RFSleepUpParameter	r819xU_phyreg.h	59;"	d
rFPGA0_RFTiming1	r819xU_phyreg.h	42;"	d
rFPGA0_RFTiming2	r819xU_phyreg.h	43;"	d
rFPGA0_RFWakeUpParameter	r819xU_phyreg.h	58;"	d
rFPGA0_TxGainStage	r819xU_phyreg.h	41;"	d
rFPGA0_TxInfo	r819xU_phyreg.h	39;"	d
rFPGA0_XAB_RFInterfaceRB	r819xU_phyreg.h	79;"	d
rFPGA0_XAB_RFInterfaceSW	r819xU_phyreg.h	66;"	d
rFPGA0_XAB_RFParameter	r819xU_phyreg.h	68;"	d
rFPGA0_XAB_SwitchControl	r819xU_phyreg.h	60;"	d
rFPGA0_XA_HSSIParameter1	r819xU_phyreg.h	46;"	d
rFPGA0_XA_HSSIParameter2	r819xU_phyreg.h	47;"	d
rFPGA0_XA_LSSIParameter	r819xU_phyreg.h	54;"	d
rFPGA0_XA_LSSIReadBack	r819xU_phyreg.h	74;"	d
rFPGA0_XA_RFInterfaceOE	r819xU_phyreg.h	62;"	d
rFPGA0_XB_HSSIParameter1	r819xU_phyreg.h	48;"	d
rFPGA0_XB_HSSIParameter2	r819xU_phyreg.h	49;"	d
rFPGA0_XB_LSSIParameter	r819xU_phyreg.h	55;"	d
rFPGA0_XB_LSSIReadBack	r819xU_phyreg.h	75;"	d
rFPGA0_XB_RFInterfaceOE	r819xU_phyreg.h	63;"	d
rFPGA0_XCD_RFInterfaceRB	r819xU_phyreg.h	80;"	d
rFPGA0_XCD_RFInterfaceSW	r819xU_phyreg.h	67;"	d
rFPGA0_XCD_RFParameter	r819xU_phyreg.h	69;"	d
rFPGA0_XCD_SwitchControl	r819xU_phyreg.h	61;"	d
rFPGA0_XC_HSSIParameter1	r819xU_phyreg.h	50;"	d
rFPGA0_XC_HSSIParameter2	r819xU_phyreg.h	51;"	d
rFPGA0_XC_LSSIParameter	r819xU_phyreg.h	56;"	d
rFPGA0_XC_LSSIReadBack	r819xU_phyreg.h	76;"	d
rFPGA0_XC_RFInterfaceOE	r819xU_phyreg.h	64;"	d
rFPGA0_XD_HSSIParameter1	r819xU_phyreg.h	52;"	d
rFPGA0_XD_HSSIParameter2	r819xU_phyreg.h	53;"	d
rFPGA0_XD_LSSIParameter	r819xU_phyreg.h	57;"	d
rFPGA0_XD_LSSIReadBack	r819xU_phyreg.h	77;"	d
rFPGA0_XD_RFInterfaceOE	r819xU_phyreg.h	65;"	d
rFPGA1_DebugSelect	r819xU_phyreg.h	85;"	d
rFPGA1_RFMOD	r819xU_phyreg.h	83;"	d
rFPGA1_TxBlock	r819xU_phyreg.h	84;"	d
rFPGA1_TxInfo	r819xU_phyreg.h	86;"	d
rGlobalCtrl	r819xU_phyreg.h	213;"	d
rOFDM0_AGCParameter1	r819xU_phyreg.h	135;"	d
rOFDM0_AGCParameter2	r819xU_phyreg.h	136;"	d
rOFDM0_AGCRSSITable	r819xU_phyreg.h	137;"	d
rOFDM0_CCADropThreshold	r819xU_phyreg.h	125;"	d
rOFDM0_CFOandDAGC	r819xU_phyreg.h	124;"	d
rOFDM0_DFSReport	r819xU_phyreg.h	150;"	d
rOFDM0_ECCAThreshold	r819xU_phyreg.h	126;"	d
rOFDM0_FrameSync	r819xU_phyreg.h	149;"	d
rOFDM0_HTSTFAGC	r819xU_phyreg.h	138;"	d
rOFDM0_LSTF	r819xU_phyreg.h	107;"	d
rOFDM0_RxDSP	r819xU_phyreg.h	123;"	d
rOFDM0_RxDetector1	r819xU_phyreg.h	119;"	d
rOFDM0_RxDetector2	r819xU_phyreg.h	120;"	d
rOFDM0_RxDetector3	r819xU_phyreg.h	121;"	d
rOFDM0_RxDetector4	r819xU_phyreg.h	122;"	d
rOFDM0_RxHPParameter	r819xU_phyreg.h	147;"	d
rOFDM0_TRMuxPar	r819xU_phyreg.h	109;"	d
rOFDM0_TRSWIsolation	r819xU_phyreg.h	110;"	d
rOFDM0_TRxPathEnable	r819xU_phyreg.h	108;"	d
rOFDM0_TxCoeff1	r819xU_phyreg.h	151;"	d
rOFDM0_TxCoeff2	r819xU_phyreg.h	152;"	d
rOFDM0_TxCoeff3	r819xU_phyreg.h	153;"	d
rOFDM0_TxCoeff4	r819xU_phyreg.h	154;"	d
rOFDM0_TxCoeff5	r819xU_phyreg.h	155;"	d
rOFDM0_TxCoeff6	r819xU_phyreg.h	156;"	d
rOFDM0_TxPseudoNoiseWgt	r819xU_phyreg.h	148;"	d
rOFDM0_XAAGCCore1	r819xU_phyreg.h	127;"	d
rOFDM0_XAAGCCore2	r819xU_phyreg.h	128;"	d
rOFDM0_XARxAFE	r819xU_phyreg.h	111;"	d
rOFDM0_XARxIQImbalance	r819xU_phyreg.h	112;"	d
rOFDM0_XATxAFE	r819xU_phyreg.h	140;"	d
rOFDM0_XATxIQImbalance	r819xU_phyreg.h	139;"	d
rOFDM0_XBAGCCore1	r819xU_phyreg.h	129;"	d
rOFDM0_XBAGCCore2	r819xU_phyreg.h	130;"	d
rOFDM0_XBRxAFE	r819xU_phyreg.h	113;"	d
rOFDM0_XBRxIQImbalance	r819xU_phyreg.h	114;"	d
rOFDM0_XBTxAFE	r819xU_phyreg.h	142;"	d
rOFDM0_XBTxIQImbalance	r819xU_phyreg.h	141;"	d
rOFDM0_XCAGCCore1	r819xU_phyreg.h	131;"	d
rOFDM0_XCAGCCore2	r819xU_phyreg.h	132;"	d
rOFDM0_XCRxAFE	r819xU_phyreg.h	115;"	d
rOFDM0_XCRxIQImbalance	r819xU_phyreg.h	116;"	d
rOFDM0_XCTxAFE	r819xU_phyreg.h	144;"	d
rOFDM0_XCTxIQImbalance	r819xU_phyreg.h	143;"	d
rOFDM0_XDAGCCore1	r819xU_phyreg.h	133;"	d
rOFDM0_XDAGCCore2	r819xU_phyreg.h	134;"	d
rOFDM0_XDRxAFE	r819xU_phyreg.h	117;"	d
rOFDM0_XDRxIQImbalance	r819xU_phyreg.h	118;"	d
rOFDM0_XDTxAFE	r819xU_phyreg.h	146;"	d
rOFDM0_XDTxIQImbalance	r819xU_phyreg.h	145;"	d
rOFDM1_CFO	r819xU_phyreg.h	162;"	d
rOFDM1_CFOTracking	r819xU_phyreg.h	166;"	d
rOFDM1_CSI1	r819xU_phyreg.h	163;"	d
rOFDM1_CSI2	r819xU_phyreg.h	165;"	d
rOFDM1_IntfDet	r819xU_phyreg.h	168;"	d
rOFDM1_LSTF	r819xU_phyreg.h	160;"	d
rOFDM1_PseudoNoiseStateAB	r819xU_phyreg.h	169;"	d
rOFDM1_PseudoNoiseStateCD	r819xU_phyreg.h	170;"	d
rOFDM1_RxPseudoNoiseWgt	r819xU_phyreg.h	171;"	d
rOFDM1_SBD	r819xU_phyreg.h	164;"	d
rOFDM1_TRxMesaure1	r819xU_phyreg.h	167;"	d
rOFDM1_TRxPathEnable	r819xU_phyreg.h	161;"	d
rOFDM_AGCReport	r819xU_phyreg.h	184;"	d
rOFDM_BWReport	r819xU_phyreg.h	183;"	d
rOFDM_LongCFOAB	r819xU_phyreg.h	177;"	d
rOFDM_LongCFOCD	r819xU_phyreg.h	178;"	d
rOFDM_PHYCounter1	r819xU_phyreg.h	172;"	d
rOFDM_PHYCounter2	r819xU_phyreg.h	173;"	d
rOFDM_PHYCounter3	r819xU_phyreg.h	174;"	d
rOFDM_PWMeasure1	r819xU_phyreg.h	181;"	d
rOFDM_PWMeasure2	r819xU_phyreg.h	182;"	d
rOFDM_RxEVMCSI	r819xU_phyreg.h	186;"	d
rOFDM_RxSNR	r819xU_phyreg.h	185;"	d
rOFDM_SIGReport	r819xU_phyreg.h	187;"	d
rOFDM_ShortCFOAB	r819xU_phyreg.h	175;"	d
rOFDM_ShortCFOCD	r819xU_phyreg.h	176;"	d
rOFDM_TailCFOAB	r819xU_phyreg.h	179;"	d
rOFDM_TailCFOCD	r819xU_phyreg.h	180;"	d
rPMAC_CCKCRC16	r819xU_phyreg.h	27;"	d
rPMAC_CCKCRxRC16Er	r819xU_phyreg.h	32;"	d
rPMAC_CCKCRxRC32Er	r819xU_phyreg.h	33;"	d
rPMAC_CCKCRxRC32OK	r819xU_phyreg.h	34;"	d
rPMAC_CCKPLCPHeader	r819xU_phyreg.h	26;"	d
rPMAC_CCKPLCPPreamble	r819xU_phyreg.h	25;"	d
rPMAC_OFDMRxCRC32Er	r819xU_phyreg.h	29;"	d
rPMAC_OFDMRxCRC32OK	r819xU_phyreg.h	28;"	d
rPMAC_OFDMRxCRC8Er	r819xU_phyreg.h	31;"	d
rPMAC_OFDMRxParityEr	r819xU_phyreg.h	30;"	d
rPMAC_PHYDebug	r819xU_phyreg.h	14;"	d
rPMAC_Reset	r819xU_phyreg.h	9;"	d
rPMAC_TxDataType	r819xU_phyreg.h	23;"	d
rPMAC_TxHTSIG1	r819xU_phyreg.h	12;"	d
rPMAC_TxHTSIG2	r819xU_phyreg.h	13;"	d
rPMAC_TxIdle	r819xU_phyreg.h	16;"	d
rPMAC_TxLegacySIG	r819xU_phyreg.h	11;"	d
rPMAC_TxMACHeader0	r819xU_phyreg.h	17;"	d
rPMAC_TxMACHeader1	r819xU_phyreg.h	18;"	d
rPMAC_TxMACHeader2	r819xU_phyreg.h	19;"	d
rPMAC_TxMACHeader3	r819xU_phyreg.h	20;"	d
rPMAC_TxMACHeader4	r819xU_phyreg.h	21;"	d
rPMAC_TxMACHeader5	r819xU_phyreg.h	22;"	d
rPMAC_TxPacketNum	r819xU_phyreg.h	15;"	d
rPMAC_TxRandomSeed	r819xU_phyreg.h	24;"	d
rPMAC_TxStart	r819xU_phyreg.h	10;"	d
rPMAC_TxStatus	r819xU_phyreg.h	35;"	d
rRTL8256RxMixerPole	r819xU_phyreg.h	864;"	d
rRTL8256TxBBBW	r819xU_phyreg.h	868;"	d
rRTL8256TxBBOPBias	r819xU_phyreg.h	866;"	d
rRTL8256_RxLPF	r819xU_phyreg.h	215;"	d
rRTL8256_TxLPF	r819xU_phyreg.h	214;"	d
rRTL8258_RSSILPF	r819xU_phyreg.h	220;"	d
rRTL8258_RxLPF	r819xU_phyreg.h	219;"	d
rRTL8258_TxLPF	r819xU_phyreg.h	218;"	d
rTxAGC_CCK_Mcs32	r819xU_phyreg.h	192;"	d
rTxAGC_Mcs03_Mcs00	r819xU_phyreg.h	193;"	d
rTxAGC_Mcs07_Mcs04	r819xU_phyreg.h	194;"	d
rTxAGC_Mcs11_Mcs08	r819xU_phyreg.h	195;"	d
rTxAGC_Mcs15_Mcs12	r819xU_phyreg.h	196;"	d
rTxAGC_Rate18_06	r819xU_phyreg.h	190;"	d
rTxAGC_Rate54_24	r819xU_phyreg.h	191;"	d
rZebra1_AGC	r819xU_phyreg.h	204;"	d
rZebra1_Channel	r819xU_phyreg.h	206;"	d
rZebra1_ChargePump	r819xU_phyreg.h	205;"	d
rZebra1_HSSIEnable	r819xU_phyreg.h	201;"	d
rZebra1_RxHPFCorner	r819xU_phyreg.h	210;"	d
rZebra1_RxLPF	r819xU_phyreg.h	209;"	d
rZebra1_TRxEnable1	r819xU_phyreg.h	202;"	d
rZebra1_TRxEnable2	r819xU_phyreg.h	203;"	d
rZebra1_TxGain	r819xU_phyreg.h	207;"	d
rZebra1_TxLPF	r819xU_phyreg.h	208;"	d
rata_index	ieee80211.h	/^        u8 rata_index;$/;"	m	struct:cb_desc
rate	ieee80211.h	/^	int rate;       \/* current rate *\/$/;"	m	struct:ieee80211_device
rate	ieee80211.h	/^	u16 rate; \/* in 100 kbps *\/$/;"	m	struct:ieee80211_rx_stats
rate	r819xU_cmdpkt.h	/^	u8	rate;$/;"	m	struct:tag_tx_stats_feedback
rateCCK	r819xU_phyreg.h	836;"	d
rateCountDiffRecord	r8192U.h	/^	u32 	rateCountDiffRecord;$/;"	m	struct:r8192_priv
rateHT	r819xU_phyreg.h	838;"	d
rateOFDM	r819xU_phyreg.h	837;"	d
rate_adaptive	r8192U.h	/^	rate_adaptive rate_adaptive;$/;"	m	struct:r8192_priv
rate_adaptive	r8192U.h	/^} rate_adaptive, *prate_adaptive;$/;"	t	typeref:struct:_rate_adaptive
rate_adaptive_disabled	r8192U.h	/^	u8				rate_adaptive_disabled;$/;"	m	struct:_rate_adaptive
rate_record	r8192U.h	/^	u32 	rate_record;$/;"	m	struct:r8192_priv
rates	ieee80211.h	/^	u8  rates[MAX_RATES_LENGTH];$/;"	m	struct:ieee80211_network
rates_ex	ieee80211.h	/^	u8  rates_ex[MAX_RATES_EX_LENGTH];$/;"	m	struct:ieee80211_network
rates_ex_len	ieee80211.h	/^	u8  rates_ex_len;$/;"	m	struct:ieee80211_network
rates_len	ieee80211.h	/^	u8  rates_len;$/;"	m	struct:ieee80211_network
ratr_state	r8192U.h	/^	u8				ratr_state;$/;"	m	struct:_rate_adaptive
raw_tx	ieee80211.h	/^	short raw_tx;$/;"	m	struct:ieee80211_device
read_cam	r8192U_core.c	/^u32 read_cam(struct net_device *dev, u8 addr)$/;"	f
read_nic_byte	r8192U_core.c	/^u8 read_nic_byte(struct net_device *dev, int indx)$/;"	f
read_nic_byte_E	r8192U_core.c	/^u8 read_nic_byte_E(struct net_device *dev, int indx)$/;"	f
read_nic_dword	r8192U_core.c	/^u32 read_nic_dword(struct net_device *dev, int indx)$/;"	f
read_nic_word	r8192U_core.c	/^u16 read_nic_word(struct net_device *dev, int indx)$/;"	f
read_nic_word_E	r8192U_core.c	/^u16 read_nic_word_E(struct net_device *dev, int indx)$/;"	f
read_rtl8225	r8180_rtl8225z2.c	/^u32 read_rtl8225(struct net_device *dev, u8 adr)$/;"	f
reason	ieee80211.h	/^        __le16 reason;$/;"	m	struct:ieee80211_disassoc
reason_code	ieee80211.h	/^    			int reason_code;$/;"	m	struct:ieee_param::__anon2::__anon5
reason_code	r8192U.h	/^			u32 reason_code;$/;"	m	struct:ipw_param::__anon9::__anon12
reassoc	ieee80211.h	/^	unsigned int reassoc;$/;"	m	struct:ieee80211_softmac_stats
received_bwtype	r8192U.h	/^	unsigned long received_bwtype[5];              \/\/0: 20M, 1: funn40M, 2: upper20M, 3: lower20M, 4: duplicate$/;"	m	struct:Stats
received_channel	ieee80211.h	/^	u8 received_channel;$/;"	m	struct:ieee80211_rx_stats
received_preamble_GI	r8192U.h	/^	unsigned long received_preamble_GI[2][32];		\/\/0: Long preamble\/GI, 1:Short preamble\/GI$/;"	m	struct:Stats
received_rate_histogram	r8192U.h	/^	unsigned long received_rate_histogram[4][32];	\/\/0: Total, 1:OK, 2:CRC, 3:ICV, 2007 07 03 cosa$/;"	m	struct:Stats
recv_signal_power	r8192U.h	/^	long recv_signal_power;	\/\/ Correct smoothed ss in Dbm, only used in driver to report real power now.$/;"	m	struct:Stats
refcnt	ieee80211_crypt.h	/^	atomic_t refcnt;$/;"	m	struct:ieee80211_crypt_data
reg_mode	ieee80211.h	/^	int reg_mode;$/;"	m	struct:ieee80211_device
reorder_spinlock	ieee80211.h	/^	spinlock_t reorder_spinlock;$/;"	m	struct:ieee80211_device
req_declined	ieee80211.h	/^	req_declined	= 0x25, \/\/ 37$/;"	e	enum:_ReasonCode
req_not_honored	ieee80211.h	/^	req_not_honored= 0x27,	\/\/ 39$/;"	e	enum:_ReasonCode
reserve	r8192U.h	/^	u16				reserve;	$/;"	m	struct:_rate_adaptive
reserve	r819xU_cmdpkt.h	/^	u16	reserve;$/;"	m	struct:tag_cmd_pkt_interrupt_status
reserve1	r819xU_cmdpkt.h	/^	u16	reserve1;			$/;"	m	struct:tag_rx_debug_message_feedback
reserve1	r819xU_cmdpkt.h	/^	u16	reserve1;			$/;"	m	struct:tag_tx_stats_feedback
reserve1	r819xU_cmdpkt.h	/^	u16	reserve1;			\/* *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
reserve1	r819xU_cmdpkt.h	/^	u8	reserve1:4;			\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
reserve2	r819xU_cmdpkt.h	/^	u16	reserve2;			\/\/$/;"	m	struct:tag_tx_stats_feedback
reserve2	r819xU_cmdpkt.h	/^	u8	reserve2;			\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
reserve3	r819xU_cmdpkt.h	/^	u16	reserve3;			\/* *\/	$/;"	m	struct:tag_cmd_pkt_tx_feedback
reserve3_1	r819xU_cmdpkt.h	/^	u8	reserve3_1;$/;"	m	struct:tag_tx_stats_feedback
reserve3_23	r819xU_cmdpkt.h	/^	u16	reserve3_23;$/;"	m	struct:tag_tx_stats_feedback
reserved	ieee80211.h	/^			u8 reserved[32];$/;"	m	struct:ieee_param::__anon2::__anon4
reserved	ieee80211.h	/^		u16 reserved:1;$/;"	m	struct:_frameqos::__anon7
reserved	ieee80211.h	/^	u16 reserved;$/;"	m	struct:ieee80211_txb
reserved	ieee80211.h	/^	u8 reserved;$/;"	m	struct:ieee80211_wmm_ts_info
reserved	ieee80211.h	/^        u8 reserved;$/;"	m	struct:ieee80211_qos_parameter_info
reserved	r8192U.h	/^			u8 reserved[32];$/;"	m	struct:ipw_param::__anon9::__anon11
reserved	r8192U.h	/^	u8			reserved:4;$/;"	m	struct:_phy_ofdm_rx_status_rxsc_sgien_exintfflag
reserved	r8192U_dm.h	/^	u8		reserved;$/;"	m	struct:_Dynamic_Rx_Path_Selection_
reserved1	ieee80211.h	/^        u8 reserved1;$/;"	m	struct:cb_desc
reserved1	r819xU_cmdpkt.h	/^	u16	reserved1;				$/;"	m	struct:tag_tx_rate_history
reserved12	ieee80211.h	/^        u8 reserved12;$/;"	m	struct:cb_desc
reserved2	ieee80211.h	/^        u8 reserved2:1;$/;"	m	struct:cb_desc
reserved6	ieee80211.h	/^        u8 reserved6;$/;"	m	struct:cb_desc
reserved7	ieee80211.h	/^        u8 reserved7;$/;"	m	struct:cb_desc
reserved8	ieee80211.h	/^        u8 reserved8;$/;"	m	struct:cb_desc
reset_count	r8192U.h	/^	u32 reset_count;$/;"	m	struct:r8192_priv
reset_on_keychange	ieee80211.h	/^	int reset_on_keychange; \/* Set to 1 if the HW needs to be reset on$/;"	m	struct:ieee80211_device
reset_port	ieee80211.h	/^	int (*reset_port)(struct net_device *dev);$/;"	m	struct:ieee80211_device
reset_wq	r8192U.h	/^	struct tq_struct reset_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::tq_struct
reset_wq	r8192U.h	/^	struct work_struct reset_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
retry_cnt	r819xU_cmdpkt.h	/^	u8	retry_cnt;			\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
retry_data	r8192U.h	/^	u8 retry_data;$/;"	m	struct:r8192_priv
retry_rts	r8192U.h	/^	u8 retry_rts;$/;"	m	struct:r8192_priv
rf3wireOffset	r8192U.h	/^	u32 rf3wireOffset; 		\/\/ LSSI data: \/\/		0x840~0x84f [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfAGCControl1	r8192U.h	/^	u32 rfAGCControl1; 	\/\/AGC parameter control1 : \/\/		0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] $/;"	m	struct:_BB_REGISTER_DEFINITION
rfAGCControl2	r8192U.h	/^	u32 rfAGCControl2; 	\/\/AGC parameter control2 : \/\/		0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] $/;"	m	struct:_BB_REGISTER_DEFINITION
rfHSSIPara1	r8192U.h	/^	u32 rfHSSIPara1; 		\/\/ wire parameter control1 : \/\/		0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfHSSIPara2	r8192U.h	/^	u32 rfHSSIPara2; 		\/\/ wire parameter control2 : \/\/		0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfLSSIReadBack	r8192U.h	/^	u32 rfLSSIReadBack; 	\/\/LSSI RF readback data \/\/		0x8a0~0x8af [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfLSSI_Select	r8192U.h	/^	u32 rfLSSI_Select; 		\/\/ BB Band Select: \/\/		0x878~0x87f [8 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfRxAFE	r8192U.h	/^	u32 rfRxAFE;  			\/\/Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : \/\/		0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfRxIQImbalance	r8192U.h	/^	u32 rfRxIQImbalance; 	\/\/OFDM Rx IQ imbalance matrix : \/\/		0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfSwitchControl	r8192U.h	/^	u32 rfSwitchControl; 	\/\/Tx Rx antenna control : \/\/		0x858~0x85f [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfTxAFE	r8192U.h	/^	u32 rfTxAFE; 			\/\/Tx IQ DC Offset and Tx DFIR type \/\/		0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfTxGainStage	r8192U.h	/^	u32 rfTxGainStage;		\/\/ Tx gain stage: \/\/		0x80c~0x80f [4 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfTxIQImbalance	r8192U.h	/^	u32 rfTxIQImbalance; 	\/\/OFDM Tx IQ imbalance matrix \/\/		0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rf_chip	r8192U.h	/^	RT_RF_TYPE_819xU rf_chip;$/;"	m	struct:r8192_priv
rf_close	r8192U.h	/^	void (*rf_close)(struct net_device *dev);$/;"	m	struct:r8192_priv
rf_enable_rssi_th	r8192U_dm.h	/^	u8		rf_enable_rssi_th[4];$/;"	m	struct:_Dynamic_Rx_Path_Selection_
rf_init	r8192U.h	/^	void (*rf_init)(struct net_device *dev);$/;"	m	struct:r8192_priv
rf_rssi	r8192U_dm.h	/^	u8		rf_rssi[4];$/;"	m	struct:_Dynamic_Rx_Path_Selection_
rf_sem	r8192U.h	/^	struct semaphore rf_sem; \/\/used to lock rf write operation added by wb, modified by david$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::semaphore
rf_set_chan	r8192U.h	/^	u8 (*rf_set_chan)(struct net_device *dev,u8 ch);$/;"	m	struct:r8192_priv
rf_set_sens	r8192U.h	/^	short (*rf_set_sens)(struct net_device *dev,short sens);$/;"	m	struct:r8192_priv
rf_type	r8192U.h	/^	u8 rf_type; \/\/0 means 1T2R, 1 means 2T4R$/;"	m	struct:r8192_priv
rfa_txpowertrackingindex	r8192U.h	/^	u8 rfa_txpowertrackingindex;$/;"	m	struct:r8192_priv
rfc_txpowertrackingindex	r8192U.h	/^	u8 rfc_txpowertrackingindex;$/;"	m	struct:r8192_priv
rfintfe	r8192U.h	/^	u32 rfintfe; 			\/\/ output enable: \/\/		0x860~0x86f [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfintfi	r8192U.h	/^	u32 rfintfi; 			\/\/ readback data: \/\/		0x8e0~0x8e7[8 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfintfo	r8192U.h	/^	u32 rfintfo; 			\/\/ output data: \/\/		0x860~0x86f [16 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfintfs	r8192U.h	/^	u32 rfintfs; 			\/\/ set software control: \/\/		0x870~0x877[8 bytes]$/;"	m	struct:_BB_REGISTER_DEFINITION
rfpath_check_wq	r8192U.h	/^	struct delayed_work rfpath_check_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::delayed_work
rfpath_check_wq	r8192U.h	/^	struct tq_struct rfpath_check_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::tq_struct
rfpath_check_wq	r8192U.h	/^	struct work_struct rfpath_check_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
rsn_ie	ieee80211.h	/^	u8  rsn_ie[MAX_WPA_IE_LEN];$/;"	m	struct:ieee80211_network
rsn_ie_len	ieee80211.h	/^	size_t rsn_ie_len;$/;"	m	struct:ieee80211_network
rssi	ieee80211.h	/^	s8 rssi;$/;"	m	struct:ieee80211_rx_stats
rssi_high_power_highthresh	r8192U_dm.h	/^	long		rssi_high_power_highthresh;$/;"	m	struct:_dynamic_initial_gain_threshold_
rssi_high_power_lowthresh	r8192U_dm.h	/^	long		rssi_high_power_lowthresh;$/;"	m	struct:_dynamic_initial_gain_threshold_
rssi_high_thresh	r8192U_dm.h	/^	long		rssi_high_thresh;$/;"	m	struct:_dynamic_initial_gain_threshold_
rssi_low_thresh	r8192U_dm.h	/^	long		rssi_low_thresh;$/;"	m	struct:_dynamic_initial_gain_threshold_
rssi_val	r8192U_dm.h	/^	long		rssi_val;$/;"	m	struct:_dynamic_initial_gain_threshold_
rt_firmware	r8192U.h	/^}rt_firmware, *prt_firmware;$/;"	t	typeref:struct:_rt_firmware
rt_firmware_info_819xUsb	r8192U.h	/^}rt_firmware_info_819xUsb, *prt_firmware_info_819xUsb;$/;"	t	typeref:struct:_rt_firmware_info_819xUsb
rt_global_debug_component	r8192U_core.c	/^u32 rt_global_debug_component = \\$/;"	v
rt_status	r819xU_cmdpkt.c	/^}rt_status,*prt_status;$/;"	t	typeref:enum:_rt_status	file:
rt_tx_rahis_t	r8192U.h	/^}rt_tx_rahis_t, *prt_tx_rahis_t;$/;"	t	typeref:struct:_rt_9x_tx_rate_history
rtl8180_enable_wake	r8180_pm.c	/^int rtl8180_enable_wake (struct pci_dev *dev, u32 state, int enable)$/;"	f
rtl8180_rates	r8192U_wx.c	/^u32 rtl8180_rates[] = {1000000,2000000,5500000,11000000,$/;"	v
rtl8180_resume	r8180_pm.c	/^int rtl8180_resume (struct pci_dev *dev)$/;"	f
rtl8180_save_state	r8180_pm.c	/^int rtl8180_save_state (struct pci_dev *dev, u32 state)$/;"	f
rtl8180_suspend	r8180_pm.c	/^int rtl8180_suspend (struct pci_dev *dev, u32 state)$/;"	f
rtl8180_wx_get_range	r8192U_wx.c	/^static int rtl8180_wx_get_range(struct net_device *dev, $/;"	f	file:
rtl8190_fwboot_array	r819xU_firmware_img.h	/^u8 rtl8190_fwboot_array[] = {$/;"	v
rtl8190_fwdata_array	r819xU_firmware_img.h	/^u8 rtl8190_fwdata_array[] = {$/;"	v
rtl8190_fwmain_array	r819xU_firmware_img.h	/^u8 rtl8190_fwmain_array[] = {$/;"	v
rtl8192_BBConfig	r819xU_phy.c	/^void rtl8192_BBConfig(struct net_device* dev)$/;"	f
rtl8192_BB_Config_ParaFile	r819xU_phy.c	/^void rtl8192_BB_Config_ParaFile(struct net_device* dev)$/;"	f
rtl8192_CalculateBitShift	r819xU_phy.c	/^u32 rtl8192_CalculateBitShift(u32 dwBitMask)$/;"	f
rtl8192_InitBBRFRegDef	r819xU_phy.c	/^void rtl8192_InitBBRFRegDef(struct net_device* dev)$/;"	f
rtl8192_IsWirelessBMode	r8192U_core.c	/^inline u8 rtl8192_IsWirelessBMode(u16 rate)$/;"	f
rtl8192_QueryBBReg	r819xU_phy.c	/^u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask)$/;"	f
rtl8192_SetBWMode	r819xU_phy.c	/^void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH	Bandwidth, HT_EXTCHNL_OFFSET Offset)$/;"	f
rtl8192_SetBWModeWorkItem	r819xU_phy.c	/^void rtl8192_SetBWModeWorkItem(struct work_struct *work)$/;"	f
rtl8192_SetRFPowerState	r819xU_phy.c	/^bool rtl8192_SetRFPowerState(struct net_device *dev, RT_RF_POWER_STATE eRFPowerState)$/;"	f
rtl8192_SetTxPowerLevel	r819xU_phy.c	/^void rtl8192_SetTxPowerLevel(struct net_device *dev, u8 channel)$/;"	f
rtl8192_SetWirelessMode	r8192U_core.c	/^void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)$/;"	f
rtl8192_SwChnl_WorkItem	r819xU_phy.c	/^void rtl8192_SwChnl_WorkItem(struct work_struct *work)$/;"	f
rtl8192_adapter_start	r8192U_core.c	/^void rtl8192_adapter_start(struct net_device *dev)$/;"	f
rtl8192_beacon_stop	r8192U_core.c	/^void rtl8192_beacon_stop(struct net_device *dev)$/;"	f
rtl8192_cancel_deferred_work	r8192U_core.c	/^void rtl8192_cancel_deferred_work(struct r8192_priv* priv)$/;"	f
rtl8192_close	r8192U_core.c	/^int rtl8192_close(struct net_device *dev)$/;"	f
rtl8192_commit	r8192U_core.c	/^void rtl8192_commit(struct net_device *dev)$/;"	f
rtl8192_config_rate	r8192U_core.c	/^void rtl8192_config_rate(struct net_device* dev, u16* rate_config)$/;"	f
rtl8192_data_hard_resume	r8192U_core.c	/^void rtl8192_data_hard_resume(struct net_device *dev)$/;"	f
rtl8192_data_hard_stop	r8192U_core.c	/^void rtl8192_data_hard_stop(struct net_device *dev)$/;"	f
rtl8192_down	r8192U_core.c	/^int rtl8192_down(struct net_device *dev)$/;"	f
rtl8192_dump_reg	r8192U_core.c	/^void rtl8192_dump_reg(struct net_device *dev)$/;"	f
rtl8192_getSupportedWireleeMode	r8192U_core.c	/^u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)$/;"	f
rtl8192_get_eeprom_size	r8192U_core.c	/^static void rtl8192_get_eeprom_size(struct net_device* dev)$/;"	f	file:
rtl8192_handle_assoc_response	r8192U_core.c	/^static int rtl8192_handle_assoc_response(struct net_device *dev,$/;"	f	file:
rtl8192_handle_beacon	r8192U_core.c	/^static int rtl8192_handle_beacon(struct net_device * dev,$/;"	f	file:
rtl8192_hard_data_xmit	r8192U_core.c	/^void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)$/;"	f
rtl8192_hard_start_xmit	r8192U_core.c	/^int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)$/;"	f
rtl8192_hwconfig	r8192U_core.c	/^void rtl8192_hwconfig(struct net_device* dev)$/;"	f
rtl8192_init	r8192U_core.c	/^short rtl8192_init(struct net_device *dev)$/;"	f
rtl8192_init_priv_lock	r8192U_core.c	/^static void rtl8192_init_priv_lock(struct r8192_priv* priv)$/;"	f	file:
rtl8192_init_priv_task	r8192U_core.c	/^static void rtl8192_init_priv_task(struct net_device* dev)$/;"	f	file:
rtl8192_init_priv_variable	r8192U_core.c	/^static void rtl8192_init_priv_variable(struct net_device* dev)$/;"	f	file:
rtl8192_ioctl	r8192U_core.c	/^int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)$/;"	f
rtl8192_irq_rx_tasklet	r8192U_core.c	/^void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)$/;"	f
rtl8192_link_change	r8192U_core.c	/^void rtl8192_link_change(struct net_device *dev)$/;"	f
rtl8192_net_update	r8192U_core.c	/^void rtl8192_net_update(struct net_device *dev)$/;"	f
rtl8192_open	r8192U_core.c	/^int rtl8192_open(struct net_device *dev)$/;"	f
rtl8192_phyConfigBB	r819xU_phy.c	/^void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType)$/;"	f
rtl8192_phy_CheckIsLegalRFPath	r819xU_phy.c	/^u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)$/;"	f
rtl8192_phy_ConfigRFWithHeaderFile	r819xU_phy.c	/^u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E	eRFPath)$/;"	f
rtl8192_phy_FinishSwChnlNow	r819xU_phy.c	/^void rtl8192_phy_FinishSwChnlNow(struct net_device *dev, u8 channel)$/;"	f
rtl8192_phy_QueryRFReg	r819xU_phy.c	/^u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask)$/;"	f
rtl8192_phy_RFConfig	r819xU_phy.c	/^void rtl8192_phy_RFConfig(struct net_device* dev)$/;"	f
rtl8192_phy_RFSerialRead	r819xU_phy.c	/^u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset)$/;"	f
rtl8192_phy_RFSerialWrite	r819xU_phy.c	/^void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data)$/;"	f
rtl8192_phy_SetRFReg	r819xU_phy.c	/^void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data)$/;"	f
rtl8192_phy_SetSwChnlCmdArray	r819xU_phy.c	/^u8 rtl8192_phy_SetSwChnlCmdArray($/;"	f
rtl8192_phy_SwChnl	r819xU_phy.c	/^u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel)$/;"	f
rtl8192_phy_SwChnlStepByStep	r819xU_phy.c	/^u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8* stage, u8* step, u32* delay)$/;"	f
rtl8192_phy_checkBBAndRF	r819xU_phy.c	/^u8 rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath)$/;"	f
rtl8192_phy_configmac	r819xU_phy.c	/^void rtl8192_phy_configmac(struct net_device* dev)$/;"	f
rtl8192_phy_getTxPower	r819xU_phy.c	/^void rtl8192_phy_getTxPower(struct net_device* dev)$/;"	f
rtl8192_phy_setTxPower	r819xU_phy.c	/^void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel)$/;"	f
rtl8192_phy_updateInitGain	r819xU_phy.c	/^void rtl8192_phy_updateInitGain(struct net_device* dev)$/;"	f
rtl8192_proc	r8192U_core.c	/^static struct proc_dir_entry *rtl8192_proc = NULL;$/;"	v	typeref:struct:proc_dir_entry	file:
rtl8192_proc_init_one	r8192U_core.c	/^void rtl8192_proc_init_one(struct net_device *dev)$/;"	f
rtl8192_proc_module_init	r8192U_core.c	/^void rtl8192_proc_module_init(void)$/;"	f
rtl8192_proc_module_remove	r8192U_core.c	/^void rtl8192_proc_module_remove(void)$/;"	f
rtl8192_proc_remove_one	r8192U_core.c	/^void rtl8192_proc_remove_one(struct net_device *dev)$/;"	f
rtl8192_process_phyinfo	r8192U_core.c	/^void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)$/;"	f
rtl8192_qos_activate	r8192U_core.c	/^void rtl8192_qos_activate(struct work_struct * work)$/;"	f
rtl8192_qos_association_resp	r8192U_core.c	/^static int rtl8192_qos_association_resp(struct r8192_priv *priv,$/;"	f	file:
rtl8192_qos_handle_probe_response	r8192U_core.c	/^static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,$/;"	f	file:
rtl8192_query_rxphystatus	r8192U_core.c	/^static void rtl8192_query_rxphystatus($/;"	f	file:
rtl8192_rate2rate	r8192U_core.c	/^inline u16 rtl8192_rate2rate(short rate)$/;"	f
rtl8192_read_eeprom_info	r8192U_core.c	/^static void rtl8192_read_eeprom_info(struct net_device* dev)$/;"	f	file:
rtl8192_record_rxdesc_forlateruse	r8192U_core.c	/^rtl8192_record_rxdesc_forlateruse($/;"	f
rtl8192_refresh_supportrate	r8192U_core.c	/^void rtl8192_refresh_supportrate(struct r8192_priv* priv)$/;"	f
rtl8192_restart	r8192U_core.c	/^void rtl8192_restart(struct work_struct *work)$/;"	f
rtl8192_rtx_disable	r8192U_core.c	/^void rtl8192_rtx_disable(struct net_device *dev)$/;"	f
rtl8192_rx_cmd	r8192U_core.c	/^void rtl8192_rx_cmd(struct sk_buff *skb)$/;"	f
rtl8192_rx_enable	r8192U_core.c	/^void rtl8192_rx_enable(struct net_device *dev)$/;"	f
rtl8192_rx_info	r8192U.h	/^typedef struct rtl8192_rx_info {$/;"	s
rtl8192_rx_info	r8192U.h	/^}rtl8192_rx_info ;$/;"	t	typeref:struct:rtl8192_rx_info
rtl8192_rx_initiate	r8192U_core.c	/^static int rtl8192_rx_initiate(struct net_device*dev)$/;"	f	file:
rtl8192_rx_isr	r8192U_core.c	/^static void rtl8192_rx_isr(struct urb *urb, struct pt_regs *regs)$/;"	f	file:
rtl8192_rx_nomal	r8192U_core.c	/^void rtl8192_rx_nomal(struct sk_buff* skb)$/;"	f
rtl8192_setBBreg	r819xU_phy.c	/^void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData)$/;"	f
rtl8192_set_chan	r8192U_core.c	/^void rtl8192_set_chan(struct net_device *dev,short ch)$/;"	f
rtl8192_set_mode	r8192U_core.c	/^void rtl8192_set_mode(struct net_device *dev,int mode)$/;"	f
rtl8192_set_rxconf	r8192U_core.c	/^void rtl8192_set_rxconf(struct net_device *dev)$/;"	f
rtl8192_stats	r8192U_core.c	/^static struct net_device_stats *rtl8192_stats(struct net_device *dev)$/;"	f	file:
rtl8192_try_wake_queue	r8192U_core.c	/^void rtl8192_try_wake_queue(struct net_device *dev, int pri)$/;"	f
rtl8192_tx	r8192U_core.c	/^short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)$/;"	f
rtl8192_tx_enable	r8192U_core.c	/^void rtl8192_tx_enable(struct net_device *dev)$/;"	f
rtl8192_tx_isr	r8192U_core.c	/^static void rtl8192_tx_isr(struct urb *tx_urb, struct pt_regs *reg)$/;"	f	file:
rtl8192_up	r8192U_core.c	/^int rtl8192_up(struct net_device *dev)$/;"	f
rtl8192_update_beacon	r8192U_core.c	/^void rtl8192_update_beacon(struct work_struct * work)$/;"	f
rtl8192_update_cap	r8192U_core.c	/^void rtl8192_update_cap(struct net_device* dev, u16 cap)$/;"	f
rtl8192_update_msr	r8192U_core.c	/^void rtl8192_update_msr(struct net_device *dev)$/;"	f
rtl8192_update_ratr_table	r8192U_core.c	/^void rtl8192_update_ratr_table(struct net_device* dev)$/;"	f
rtl8192_usb_deleteendpoints	r8192U_core.c	/^void rtl8192_usb_deleteendpoints(struct net_device *dev)$/;"	f
rtl8192_usb_disconnect	r8192U_core.c	/^static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)$/;"	f	file:
rtl8192_usb_driver	r8192U_core.c	/^static struct usb_driver rtl8192_usb_driver = {$/;"	v	typeref:struct:usb_driver	file:
rtl8192_usb_id_tbl	r8192U_core.c	/^static struct usb_device_id rtl8192_usb_id_tbl[] = {$/;"	v	typeref:struct:usb_device_id	file:
rtl8192_usb_initendpoints	r8192U_core.c	/^short rtl8192_usb_initendpoints(struct net_device *dev)$/;"	f
rtl8192_usb_module_exit	r8192U_core.c	/^module_exit(rtl8192_usb_module_exit);$/;"	v
rtl8192_usb_module_exit	r8192U_core.c	/^static void __exit rtl8192_usb_module_exit(void)$/;"	f	file:
rtl8192_usb_module_init	r8192U_core.c	/^module_init(rtl8192_usb_module_init);$/;"	v
rtl8192_usb_module_init	r8192U_core.c	/^static int __init rtl8192_usb_module_init(void)$/;"	f	file:
rtl8192_usb_probe	r8192U_core.c	/^static int __devinit rtl8192_usb_probe(struct usb_interface *intf,$/;"	f	file:
rtl819XAGCTAB_Array	r819xU_phy.c	/^u32 rtl819XAGCTAB_Array[AGCTAB_ArrayLength] = {$/;"	v
rtl819XMACPHY_Array_PG	r819xU_phy.c	/^u32 rtl819XMACPHY_Array_PG[] = {$/;"	v
rtl819XPHY_REG_1T2RArray	r819xU_phy.c	/^u32 rtl819XPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength] = {$/;"	v
rtl819XRadioA_Array	r819xU_phy.c	/^u32 rtl819XRadioA_Array[RadioA_ArrayLength] = {$/;"	v
rtl819XRadioB_Array	r819xU_phy.c	/^u32 rtl819XRadioB_Array[RadioB_ArrayLength] = {$/;"	v
rtl819XRadioC_Array	r819xU_phy.c	/^u32 rtl819XRadioC_Array[RadioC_ArrayLength] = {$/;"	v
rtl819XRadioD_Array	r819xU_phy.c	/^u32 rtl819XRadioD_Array[RadioD_ArrayLength] = {$/;"	v
rtl819xU_cmd_isr	r8192U_core.c	/^void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)$/;"	f
rtl819xU_tx_cmd	r8192U_core.c	/^short rtl819xU_tx_cmd(struct net_device *dev, struct sk_buff *skb)$/;"	f
rtl819xUsb_loopback_e	r8192U.h	/^}rtl819xUsb_loopback_e;$/;"	t	typeref:enum:_rtl819xUsb_loopback
rtl819x_evm_dbtopercentage	r8192U_core.c	/^rtl819x_evm_dbtopercentage($/;"	f	file:
rtl819x_query_rxpwrpercentage	r8192U_core.c	/^static u8 rtl819x_query_rxpwrpercentage($/;"	f	file:
rtl819x_signal_scale_mapping	r8192U_core.c	/^rtl819x_signal_scale_mapping($/;"	f
rtl819x_translate_todbm	r8192U_core.c	/^long rtl819x_translate_todbm(u8 signal_strength_index	)\/\/ 0-100 index.$/;"	f
rtl819xusb_beacon_tx	r8192U_core.c	/^void rtl819xusb_beacon_tx(struct net_device *dev,u16  tx_rate)$/;"	f
rtl819xusb_process_received_packet	r8192U_core.c	/^rtl819xusb_process_received_packet($/;"	f
rtl819xusb_rx_command_packet	r8192U_core.c	/^rtl819xusb_rx_command_packet($/;"	f
rtl8225_SetTXPowerLevel	r8180_rtl8225.c	/^void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)$/;"	f
rtl8225_agc	r8180_rtl8225.c	/^u8 rtl8225_agc[]={$/;"	v
rtl8225_chan	r8180_rtl8225.c	/^u32 rtl8225_chan[] = {$/;"	v
rtl8225_gain	r8180_rtl8225.c	/^u8 rtl8225_gain[]={$/;"	v
rtl8225_host_pci_init	r8180_rtl8225.c	/^void rtl8225_host_pci_init(struct net_device *dev) $/;"	f
rtl8225_host_usb_init	r8180_rtl8225.c	/^void rtl8225_host_usb_init(struct net_device *dev) $/;"	f
rtl8225_is_V_z2	r8180_rtl8225z2.c	/^short rtl8225_is_V_z2(struct net_device *dev)$/;"	f
rtl8225_rf_close	r8180_rtl8225.c	/^void rtl8225_rf_close(struct net_device *dev)$/;"	f
rtl8225_rf_init	r8180_rtl8225.c	/^void rtl8225_rf_init(struct net_device *dev) $/;"	f
rtl8225_rf_set_chan	r8180_rtl8225.c	/^void rtl8225_rf_set_chan(struct net_device *dev, short ch)$/;"	f
rtl8225_rf_set_sens	r8180_rtl8225.c	/^short rtl8225_rf_set_sens(struct net_device *dev, short sens)$/;"	f
rtl8225_set_gain	r8180_rtl8225.c	/^void rtl8225_set_gain(struct net_device *dev, short gain)$/;"	f
rtl8225_threshold	r8180_rtl8225.c	/^u8 rtl8225_threshold[]={$/;"	v
rtl8225_tx_gain_cck_ofdm	r8180_rtl8225.c	/^u8 rtl8225_tx_gain_cck_ofdm[]={$/;"	v
rtl8225_tx_power_cck	r8180_rtl8225.c	/^u8 rtl8225_tx_power_cck[]={$/;"	v
rtl8225_tx_power_cck_ch14	r8180_rtl8225.c	/^u8 rtl8225_tx_power_cck_ch14[]={$/;"	v
rtl8225_tx_power_ofdm	r8180_rtl8225.c	/^u8 rtl8225_tx_power_ofdm[]={$/;"	v
rtl8225bcd_rxgain	r8180_rtl8225.c	/^u16 rtl8225bcd_rxgain[]={	$/;"	v
rtl8225z2_SetTXPowerLevel	r8180_rtl8225z2.c	/^void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)$/;"	f
rtl8225z2_gain_a	r8180_rtl8225z2.c	/^u8 rtl8225z2_gain_a[]={$/;"	v
rtl8225z2_gain_bg	r8180_rtl8225z2.c	/^u8 rtl8225z2_gain_bg[]={$/;"	v
rtl8225z2_rf_init	r8180_rtl8225z2.c	/^void rtl8225z2_rf_init(struct net_device *dev) $/;"	f
rtl8225z2_rf_set_chan	r8180_rtl8225z2.c	/^void rtl8225z2_rf_set_chan(struct net_device *dev, short ch)$/;"	f
rtl8225z2_rf_set_mode	r8180_rtl8225z2.c	/^void rtl8225z2_rf_set_mode(struct net_device *dev) $/;"	f
rtl8225z2_rxgain	r8180_rtl8225z2.c	/^u16 rtl8225z2_rxgain[]={	$/;"	v
rtl8225z2_set_gain	r8180_rtl8225z2.c	/^void rtl8225z2_set_gain(struct net_device *dev, short gain)$/;"	f
rtl8225z2_threshold	r8180_rtl8225z2.c	/^u8 rtl8225z2_threshold[]={$/;"	v
rtl8225z2_tx_power_cck	r8180_rtl8225z2.c	/^u8 rtl8225z2_tx_power_cck[]={$/;"	v
rtl8225z2_tx_power_cck_ch14	r8180_rtl8225z2.c	/^u8 rtl8225z2_tx_power_cck_ch14[]={$/;"	v
rtl8225z2_tx_power_ofdm	r8180_rtl8225z2.c	/^u8 rtl8225z2_tx_power_ofdm[]={$/;"	v
rtl_rate	r8192U_core.c	/^static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};$/;"	v	file:
rtl_reg_debug	r8192U.h	/^typedef struct rtl_reg_debug{$/;"	s
rtl_reg_debug	r8192U.h	/^}rtl_reg_debug;$/;"	t	typeref:struct:rtl_reg_debug
rts	ieee80211.h	/^        u16 rts; \/* RTS threshold *\/$/;"	m	struct:ieee80211_device
rts	r8192U.h	/^	u16 rts;$/;"	m	struct:r8192_priv
rts_included	ieee80211.h	/^	u8 rts_included;$/;"	m	struct:ieee80211_txb
rts_rate	ieee80211.h	/^        u8 rts_rate;$/;"	m	struct:cb_desc
rxSNRdB	r8192U.h	/^	long rxSNRdB[4];$/;"	m	struct:Stats
rx_AMPDUnum_histogram	r8192U.h	/^	unsigned long rx_AMPDUnum_histogram[5]; \/\/ level: (<5), (5~10), (10~20), (20~40), (>40)$/;"	m	struct:Stats
rx_AMPDUsize_histogram	r8192U.h	/^	unsigned long rx_AMPDUsize_histogram[5]; \/\/ level: (<4K), (4K~8K), (8K~16K), (16K~32K), (32K~64K)$/;"	m	struct:Stats
rx_ass_err	ieee80211.h	/^	unsigned int rx_ass_err;$/;"	m	struct:ieee80211_softmac_stats
rx_ass_ok	ieee80211.h	/^	unsigned int rx_ass_ok;$/;"	m	struct:ieee80211_softmac_stats
rx_ass_rq	ieee80211.h	/^	unsigned int rx_ass_rq;$/;"	m	struct:ieee80211_softmac_stats
rx_auth_rq	ieee80211.h	/^	unsigned int rx_auth_rq;$/;"	m	struct:ieee80211_softmac_stats
rx_auth_rs_err	ieee80211.h	/^	unsigned int rx_auth_rs_err;$/;"	m	struct:ieee80211_softmac_stats
rx_auth_rs_ok	ieee80211.h	/^	unsigned int rx_auth_rs_ok;$/;"	m	struct:ieee80211_softmac_stats
rx_cmd_urb	r8192U.h	/^	struct urb **rx_cmd_urb;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::urb
rx_desc_819x_usb	r8192U.h	/^typedef struct rx_desc_819x_usb{$/;"	s
rx_desc_819x_usb	r8192U.h	/^}rx_desc_819x_usb, *prx_desc_819x_usb;$/;"	t	typeref:struct:rx_desc_819x_usb
rx_desc_819x_usb_aggr_subframe	r8192U.h	/^}rx_desc_819x_usb_aggr_subframe, *prx_desc_819x_usb_aggr_subframe;$/;"	t	typeref:struct:_rx_desc_819x_usb_aggr_subframe
rx_discards_no_buffer	ieee80211.h	/^	unsigned int rx_discards_no_buffer;$/;"	m	struct:ieee80211_stats
rx_discards_undecryptable	ieee80211.h	/^	unsigned int rx_discards_undecryptable;$/;"	m	struct:ieee80211_stats
rx_drvinfo_819x_usb	r8192U.h	/^typedef struct rx_drvinfo_819x_usb{$/;"	s
rx_drvinfo_819x_usb	r8192U.h	/^}rx_drvinfo_819x_usb, *prx_drvinfo_819x_usb;$/;"	t	typeref:struct:rx_drvinfo_819x_usb
rx_evm_percentage	r8192U.h	/^	u8 rx_evm_percentage[2];$/;"	m	struct:Stats
rx_fcs_errors	ieee80211.h	/^	unsigned int rx_fcs_errors;$/;"	m	struct:ieee80211_stats
rx_fragments	ieee80211.h	/^	unsigned int rx_fragments;$/;"	m	struct:ieee80211_stats
rx_gain_range_max	r8192U_dm.h	/^	u8		rx_gain_range_max;$/;"	m	struct:_dynamic_initial_gain_threshold_
rx_gain_range_min	r8192U_dm.h	/^	u8		rx_gain_range_min;$/;"	m	struct:_dynamic_initial_gain_threshold_
rx_hal_is_cck_rate	r8192U_core.c	195;"	d	file:
rx_inx	r8192U.h	/^        int     rx_inx;$/;"	m	struct:r8192_priv
rx_message_in_bad_msg_fragments	ieee80211.h	/^	unsigned int rx_message_in_bad_msg_fragments;$/;"	m	struct:ieee80211_stats
rx_message_in_msg_fragments	ieee80211.h	/^	unsigned int rx_message_in_msg_fragments;$/;"	m	struct:ieee80211_stats
rx_multicast_frames	ieee80211.h	/^	unsigned int rx_multicast_frames;$/;"	m	struct:ieee80211_stats
rx_multicast_octets	ieee80211.h	/^	unsigned int rx_multicast_octets;$/;"	m	struct:ieee80211_stats
rx_probe_rq	ieee80211.h	/^	unsigned int rx_probe_rq;$/;"	m	struct:ieee80211_softmac_stats
rx_queue	r8192U.h	/^       struct sk_buff_head rx_queue;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::sk_buff_head
rx_rssi_percentage	r8192U.h	/^	u8 rx_rssi_percentage[4];$/;"	m	struct:Stats
rx_unicast_frames	ieee80211.h	/^	unsigned int rx_unicast_frames;$/;"	m	struct:ieee80211_stats
rx_unicast_octets	ieee80211.h	/^	unsigned int rx_unicast_octets;$/;"	m	struct:ieee80211_stats
rx_urb	r8192U.h	/^	struct urb **rx_urb;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::urb
rxbytesunicast	r8192U.h	/^	unsigned long rxbytesunicast;$/;"	m	struct:Stats
rxcmdpkt	r8192U.h	/^	unsigned long rxcmdpkt[4];		\/\/08\/05\/08 amy rx cmd element txfeedback\/bcn report\/cfg set\/query$/;"	m	struct:Stats
rxevm_X	r8192U.h	/^	u8	rxevm_X[2];$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
rxframgment	r8192U.h	/^	unsigned long rxframgment;$/;"	m	struct:Stats
rxoktotal	r8192U.h	/^	unsigned long rxoktotal;$/;"	m	struct:Stats
rxsc	r8192U.h	/^	u8			rxsc:2;	$/;"	m	struct:_phy_ofdm_rx_status_rxsc_sgien_exintfflag
rxsc_sgien_exflg	r8192U.h	/^	u8  rxsc_sgien_exflg;$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
rxsnr_X	r8192U.h	/^	u8	rxsnr_X[4];$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
rxstaterr	r8192U.h	/^	unsigned long rxstaterr;$/;"	m	struct:Stats
rxurb_task	r8192U.h	/^	struct urb *rxurb_task;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::urb
rxurberr	r8192U.h	/^	unsigned long rxurberr;$/;"	m	struct:Stats
sHTCLng	r819xU_HTType.h	31;"	d
s_rate	r819xU_cmdpkt.h	/^	u8	s_rate;				\/* Start rate. *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
s_rts_rate	r819xU_cmdpkt.h	/^	u8	s_rts_rate;			\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
scan_age	ieee80211.h	/^	int scan_age;$/;"	m	struct:ieee80211_device
scan_sem	ieee80211.h	/^	struct semaphore scan_sem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::semaphore
scan_syncro	ieee80211.h	/^	void (*scan_syncro)(struct net_device *dev);$/;"	m	struct:ieee80211_device
scan_timer	ieee80211.h	/^	struct timer_list scan_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
scanning	ieee80211.h	/^	short scanning;$/;"	m	struct:ieee80211_device
scans	ieee80211.h	/^	int scans;$/;"	m	struct:ieee80211_device
scrclng	r8192U.h	436;"	d
sec	ieee80211.h	/^        struct ieee80211_security sec;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_security
seg_ptr	r8192U.h	/^	u8	*seg_ptr;$/;"	m	struct:_rt_firmare_seg_container
seg_size	r8192U.h	/^	u16	seg_size;$/;"	m	struct:_rt_firmare_seg_container
sens	r8192U.h	/^	short sens;$/;"	m	struct:r8192_priv
seq	ieee80211.h	/^			u8 seq[8]; \/* sequence counter (set: RX, get: TX) *\/$/;"	m	struct:ieee_param::__anon2::__anon6
seq	ieee80211.h	/^	unsigned int seq;$/;"	m	struct:ieee80211_frag_entry
seq	r8192U.h	/^			u8 seq[8];$/;"	m	struct:ipw_param::__anon9::__anon13
seq_ctl	ieee80211.h	/^	__le16 seq_ctl;$/;"	m	struct:ieee80211_hdr_3addr
seq_ctl	ieee80211.h	/^	__le16 seq_ctl;$/;"	m	struct:ieee80211_hdr_3addrqos
seq_ctl	ieee80211.h	/^	__le16 seq_ctl;$/;"	m	struct:ieee80211_hdr_4addr
seq_ctl	ieee80211.h	/^	__le16 seq_ctl;$/;"	m	struct:ieee80211_hdr_4addrqos
seq_ctrl	ieee80211.h	/^	u16 seq_ctrl[5];$/;"	m	struct:ieee80211_device
seq_num	ieee80211.h	/^	u16 seq_num[17];$/;"	m	struct:ieee_ibss_seq
seq_num	r819xU_cmdpkt.h	/^	u16	seq_num;			\/* *\/$/;"	m	struct:tag_cmd_pkt_tx_feedback
serv_start_time	ieee80211.h	/^	u32 serv_start_time;$/;"	m	struct:ieee80211_wmm_tspec_elem
setKey	r8192U_core.c	/^void setKey(	struct net_device *dev, $/;"	f
set_chan	ieee80211.h	/^	void (*set_chan)(struct net_device *dev,short ch);$/;"	m	struct:ieee80211_device
set_key	ieee80211_crypt.h	/^	int (*set_key)(void *key, int len, u8 *seq, void *priv);$/;"	m	struct:ieee80211_crypto_ops
set_security	ieee80211.h	/^	void (*set_security)(struct net_device *dev,$/;"	m	struct:ieee80211_device
set_tx	ieee80211.h	/^			u8 set_tx;$/;"	m	struct:ieee_param::__anon2::__anon6
set_tx	r8192U.h	/^			u8 set_tx;$/;"	m	struct:ipw_param::__anon9::__anon13
sgi_en	r8192U.h	/^	u8			sgi_en:1;	$/;"	m	struct:_phy_ofdm_rx_status_rxsc_sgien_exintfflag
sgi_en	r8192U.h	/^	u8	sgi_en;$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
short_preamble	r8192U.h	/^	u8      short_preamble;$/;"	m	struct:r8192_priv
short_slot	ieee80211.h	/^	int short_slot;$/;"	m	struct:ieee80211_device
shortdata	ieee80211.h	/^	u16 shortdata;$/;"	m	union:_frameqos
sigevm	r8192U.h	/^	u8	sigevm;$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
signal	ieee80211.h	/^	u8 signal;$/;"	m	struct:ieee80211_rx_stats
signal_quality	r8192U.h	/^	long signal_quality;$/;"	m	struct:Stats
signal_strength	r8192U.h	/^	long signal_strength; \/\/ Transformed, in dbm. Beautified signal strength for UI, not correct.$/;"	m	struct:Stats
skb	ieee80211.h	/^	struct sk_buff *skb;$/;"	m	struct:ieee80211_frag_entry	typeref:struct:ieee80211_frag_entry::sk_buff
skb_aggQ	ieee80211.h	/^	struct sk_buff_head  skb_aggQ[MAX_QUEUE_SIZE]; $/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::sk_buff_head
skb_drv_aggQ	ieee80211.h	/^	struct sk_buff_head  skb_drv_aggQ[MAX_QUEUE_SIZE]; $/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::sk_buff_head
skb_queue	r8192U.h	/^       struct sk_buff_head skb_queue;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::sk_buff_head
skb_waitQ	ieee80211.h	/^	struct sk_buff_head skb_waitQ[MAX_QUEUE_SIZE];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::sk_buff_head
slide_evm	r8192U.h	/^	unsigned long slide_evm[100];$/;"	m	struct:Stats
slide_evm_total	r8192U.h	/^	unsigned long slide_evm_total;	\/\/ For recording sliding window's EVM value$/;"	m	struct:Stats
slide_rssi_total	r8192U.h	/^	unsigned long slide_rssi_total;	\/\/ For recording sliding window's RSSI value$/;"	m	struct:Stats
slide_signal_strength	r8192U.h	/^	unsigned long slide_signal_strength[100];$/;"	m	struct:Stats
slot_time	r8192U.h	/^	u8      slot_time;$/;"	m	struct:r8192_priv
snap	ieee80211.h	/^	u8 snap[6];$/;"	m	struct:eapol
softmac_data_hard_start_xmit	ieee80211.h	/^	void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,$/;"	m	struct:ieee80211_device
softmac_features	ieee80211.h	/^	u16 softmac_features;$/;"	m	struct:ieee80211_device
softmac_hard_start_xmit	ieee80211.h	/^	int (*softmac_hard_start_xmit)(struct sk_buff *skb,$/;"	m	struct:ieee80211_device
softmac_scan_wq	ieee80211.h	/^	struct tq_struct softmac_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
softmac_scan_wq	ieee80211.h	/^        struct delayed_work softmac_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
softmac_scan_wq	ieee80211.h	/^        struct work_struct softmac_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
softmac_stats	ieee80211.h	/^	struct ieee80211_softmac_stats softmac_stats;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_softmac_stats
spy_data	ieee80211.h	/^	struct iw_spy_data spy_data; $/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::iw_spy_data
sq_rpt	r8192U.h	/^	u8	sq_rpt;	$/;"	m	struct:_phy_cck_rx_status_report_819xusb
src	ieee80211.h	/^	u8 src[ETH_ALEN];$/;"	m	struct:ieee80211_rxb
src_addr	ieee80211.h	/^	u8 src_addr[ETH_ALEN];$/;"	m	struct:ieee80211_frag_entry
ssap	ieee80211.h	/^        u8    ssap;   \/* always 0xAA *\/$/;"	m	struct:ieee80211_snap_hdr
ssid	ieee80211.h	/^	u8 ssid[IW_ESSID_MAX_SIZE + 1];$/;"	m	struct:ieee80211_network
ssid_len	ieee80211.h	/^	u8 ssid_len;$/;"	m	struct:ieee80211_network
ssid_set	ieee80211.h	/^	short ssid_set;$/;"	m	struct:ieee80211_device
ssid_thread	r8192U.h	/^struct ssid_thread {$/;"	s
sta_addr	ieee80211.h	/^	u8 sta_addr[ETH_ALEN];$/;"	m	struct:ieee_param
sta_addr	r8192U.h	/^	u8 sta_addr[ETH_ALEN];$/;"	m	struct:ipw_param
sta_edca_param	ieee80211.h	/^	u32	sta_edca_param[4];$/;"	m	struct:ieee80211_device
sta_sleep	ieee80211.h	/^	short sta_sleep;$/;"	m	struct:ieee80211_device
sta_wake_up	ieee80211.h	/^	void (*sta_wake_up) (struct net_device *dev);$/;"	m	struct:ieee80211_device
start_ibss_wq	ieee80211.h	/^	struct tq_struct start_ibss_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
start_ibss_wq	ieee80211.h	/^        struct work_struct start_ibss_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
start_scan	ieee80211.h	/^	void (*start_scan)(struct net_device *dev);$/;"	m	struct:ieee80211_device
start_send_beacons	ieee80211.h	/^	void (*start_send_beacons) (struct net_device *dev,u16 tx_rate);$/;"	m	struct:ieee80211_device
state	ieee80211.h	/^	enum ieee80211_state state;$/;"	m	struct:ieee80211_device	typeref:enum:ieee80211_device::ieee80211_state
stats	ieee80211.h	/^	struct ieee80211_rx_stats stats;$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::ieee80211_rx_stats
stats	ieee80211.h	/^	struct net_device_stats stats;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::net_device_stats
stats	r8192U.h	/^	struct Stats stats;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::Stats
status	ieee80211.h	/^	__le16 status;$/;"	m	struct:ieee80211_assoc_response_frame
status	ieee80211.h	/^	__le16 status;$/;"	m	struct:ieee80211_authentication
stop_scan	ieee80211.h	/^	void (*stop_scan)(struct net_device *dev);$/;"	m	struct:ieee80211_device
stop_send_beacons	ieee80211.h	/^	void (*stop_send_beacons) (struct net_device *dev);$/;"	m	struct:ieee80211_device
subframes	ieee80211.h	/^	struct sk_buff *subframes[MAX_SUBFRAME_COUNT];$/;"	m	struct:ieee80211_rxb	typeref:struct:ieee80211_rxb::sk_buff
support_ht	ieee80211.h	/^	bool				support_ht;$/;"	m	struct:_bss_ht
supported	ieee80211.h	/^        int supported;$/;"	m	struct:ieee80211_qos_data
surp_band_allow	ieee80211.h	/^	u16 surp_band_allow;$/;"	m	struct:ieee80211_wmm_tspec_elem
suspen_inter	ieee80211.h	/^	u32 suspen_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
swtxawake	ieee80211.h	/^	unsigned int swtxawake;$/;"	m	struct:ieee80211_softmac_stats
swtxstop	ieee80211.h	/^	unsigned int swtxstop;$/;"	m	struct:ieee80211_softmac_stats
sync_scan_hurryup	ieee80211.h	/^	short sync_scan_hurryup; $/;"	m	struct:ieee80211_device
szRT2RTAggBuffer	r819xU_HTType.h	/^	u8				szRT2RTAggBuffer[10];$/;"	m	struct:_RT_HIGH_THROUGHPUT
sz_info	r8192U.h	/^	u8		sz_info[16];$/;"	m	struct:_rt_firmware_info_819xUsb
tCheckTxStatus	r819xU_phyreg.h	833;"	d
tUpdateRxCounter	r819xU_phyreg.h	834;"	d
tag_CCK_Rx_Path_Method_Definition	r8192U_dm.h	/^typedef enum tag_CCK_Rx_Path_Method_Definition$/;"	g
tag_DM_DbgMode_Definition	r8192U_dm.h	/^typedef enum tag_DM_DbgMode_Definition$/;"	g
tag_Tx_Config_Cmd_Format	r8192U_dm.h	/^typedef struct tag_Tx_Config_Cmd_Format$/;"	s
tag_cmd_pkt_interrupt_status	r819xU_cmdpkt.h	/^typedef struct tag_cmd_pkt_interrupt_status$/;"	s
tag_cmd_pkt_set_configuration	r819xU_cmdpkt.h	/^typedef struct tag_cmd_pkt_set_configuration$/;"	s
tag_cmd_pkt_tx_feedback	r819xU_cmdpkt.h	/^typedef struct tag_cmd_pkt_tx_feedback$/;"	s
tag_command_packet_directories	r819xU_cmdpkt.h	/^typedef enum tag_command_packet_directories$/;"	g
tag_dig_algorithm_definition	r8192U_dm.h	/^typedef enum tag_dig_algorithm_definition$/;"	g
tag_dig_cck_cs_ratio_state_definition	r8192U_dm.h	/^typedef enum tag_dig_cck_cs_ratio_state_definition$/;"	g
tag_dig_connect_definition	r8192U_dm.h	/^typedef enum tag_dig_connect_definition$/;"	g
tag_dig_dbgmode_definition	r8192U_dm.h	/^typedef enum tag_dig_dbgmode_definition$/;"	g
tag_dig_packetdetection_threshold_definition	r8192U_dm.h	/^typedef enum tag_dig_packetdetection_threshold_definition$/;"	g
tag_dynamic_init_gain_operation_type_definition	r8192U_dm.h	/^typedef enum tag_dynamic_init_gain_operation_type_definition$/;"	g
tag_dynamic_init_gain_state_definition	r8192U_dm.h	/^typedef enum tag_dynamic_init_gain_state_definition$/;"	g
tag_dynamic_ratr_state_definition	r8192U_dm.h	/^typedef enum tag_dynamic_ratr_state_definition$/;"	g
tag_rx_debug_message_feedback	r819xU_cmdpkt.h	/^typedef struct tag_rx_debug_message_feedback$/;"	s
tag_tx_rate_history	r819xU_cmdpkt.h	/^typedef struct tag_tx_rate_history$/;"	s
tag_tx_stats_feedback	r819xU_cmdpkt.h	/^typedef struct tag_tx_stats_feedback \/\/ PJ quick rxcmd 09042007$/;"	s
thermal_read_val	r8192U.h	/^	u8 thermal_read_val[40];$/;"	m	struct:r8192_priv
thermal_readback_index	r8192U.h	/^	u8 thermal_readback_index;$/;"	m	struct:r8192_priv
threshold_20Mhzto40Mhz	ieee80211.h	/^	long threshold_20Mhzto40Mhz;$/;"	m	struct:_bandwidth_autoswitch
threshold_40Mhzto20Mhz	ieee80211.h	/^	long	threshold_40Mhzto20Mhz;	$/;"	m	struct:_bandwidth_autoswitch
tid	ieee80211.h	/^		u16 tid:4;$/;"	m	struct:_frameqos::__anon7
tim	ieee80211.h	/^        struct ieee80211_tim_parameters tim;$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::ieee80211_tim_parameters
tim_count	ieee80211.h	/^        u8 tim_count;$/;"	m	struct:ieee80211_tim_parameters
tim_period	ieee80211.h	/^        u8 tim_period;$/;"	m	struct:ieee80211_tim_parameters
time_stamp	ieee80211.h	/^	u32 time_stamp[2];$/;"	m	struct:ieee80211_network
time_stamp	ieee80211.h	/^	u32 time_stamp[2];$/;"	m	struct:ieee80211_probe_response
tkip_countermeasures	ieee80211.h	/^	int tkip_countermeasures;$/;"	m	struct:ieee80211_device
tok	r819xU_cmdpkt.h	/^	u8	tok:1;				\/* Transmit ok. *\/		$/;"	m	struct:tag_cmd_pkt_tx_feedback
tq_init	ieee80211.h	/^static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)$/;"	f
transaction	ieee80211.h	/^	__le16 transaction;$/;"	m	struct:ieee80211_authentication
trsw_gain_X	r8192U.h	/^	u8	trsw_gain_X[4];	$/;"	m	struct:_phy_ofdm_rx_status_report_819xusb
true	ieee80211.h	/^typedef enum{false = 0, true} bool;$/;"	e	enum:__anon1
ts_info	ieee80211.h	/^	struct ieee80211_wmm_ts_info ts_info;$/;"	m	struct:ieee80211_wmm_tspec_elem	typeref:struct:ieee80211_wmm_tspec_elem::ieee80211_wmm_ts_info
tsf	ieee80211.h	/^	u64 tsf;$/;"	m	struct:ieee80211_rx_stats
two_way_tmout	ieee80211.h	/^	two_way_tmout	= 0x10,$/;"	e	enum:_ReasonCode
tx_agg_frames	ieee80211.h	/^	struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];$/;"	m	struct:ieee80211_drv_agg_txb	typeref:struct:ieee80211_drv_agg_txb::sk_buff
tx_ass_rq	ieee80211.h	/^	unsigned int tx_ass_rq;$/;"	m	struct:ieee80211_softmac_stats
tx_auth_rq	ieee80211.h	/^	unsigned int tx_auth_rq;$/;"	m	struct:ieee80211_softmac_stats
tx_beacons	ieee80211.h	/^	unsigned int tx_beacons;$/;"	m	struct:ieee80211_softmac_stats
tx_deferred_transmissions	ieee80211.h	/^	unsigned int tx_deferred_transmissions;$/;"	m	struct:ieee80211_stats
tx_desc_819x_usb	r8192U.h	/^}tx_desc_819x_usb, *ptx_desc_819x_usb;$/;"	t	typeref:struct:_tx_desc_819x_usb
tx_desc_819x_usb_aggr_subframe	r8192U.h	/^}tx_desc_819x_usb_aggr_subframe, *ptx_desc_819x_usb_aggr_subframe;$/;"	t	typeref:struct:_tx_desc_819x_usb_aggr_subframe
tx_desc_cmd_819x_usb	r8192U.h	/^}tx_desc_cmd_819x_usb, *ptx_desc_cmd_819x_usb;$/;"	t	typeref:struct:_tx_desc_cmd_819x_usb
tx_discards	ieee80211.h	/^	unsigned int tx_discards;$/;"	m	struct:ieee80211_stats
tx_discards_wrong_sa	ieee80211.h	/^	unsigned int tx_discards_wrong_sa;$/;"	m	struct:ieee80211_stats
tx_fragments	ieee80211.h	/^	unsigned int tx_fragments;$/;"	m	struct:ieee80211_stats
tx_fwinfo_819x_usb	r8192U.h	/^}tx_fwinfo_819x_usb, *ptx_fwinfo_819x_usb;$/;"	t	typeref:struct:_tx_fwinfo_819x_usb
tx_fwinfo_force_subcarriermode	r8192U.h	/^	u8 tx_fwinfo_force_subcarriermode;$/;"	m	struct:r8192_priv
tx_fwinfo_force_subcarrierval	r8192U.h	/^	u8 tx_fwinfo_force_subcarrierval;$/;"	m	struct:r8192_priv
tx_headroom	ieee80211.h	/^	int tx_headroom; \/* Set to size of any additional room needed at front$/;"	m	struct:ieee80211_device
tx_keyidx	ieee80211.h	/^	int tx_keyidx; \/* default TX key index (crypt[tx_keyidx]) *\/$/;"	m	struct:ieee80211_device
tx_lock	r8192U.h	/^	spinlock_t tx_lock;$/;"	m	struct:r8192_priv
tx_multicast_frames	ieee80211.h	/^	unsigned int tx_multicast_frames;$/;"	m	struct:ieee80211_stats
tx_multicast_octets	ieee80211.h	/^	unsigned int tx_multicast_octets;$/;"	m	struct:ieee80211_stats
tx_multiple_retry_frames	ieee80211.h	/^	unsigned int tx_multiple_retry_frames;$/;"	m	struct:ieee80211_stats
tx_op_limit	ieee80211.h	/^        __le16 tx_op_limit;$/;"	m	struct:ieee80211_qos_ac_parameter
tx_op_limit	ieee80211.h	/^        __le16 tx_op_limit[QOS_QUEUE_NUM];$/;"	m	struct:ieee80211_qos_parameters
tx_pending	ieee80211.h	/^	struct  tx_pending_t tx_pending;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tx_pending_t
tx_pending	r8192U.h	/^	atomic_t tx_pending[0x10];\/\/UART_PRIORITY+1$/;"	m	struct:r8192_priv
tx_pending_t	ieee80211.h	/^typedef struct tx_pending_t{$/;"	s
tx_pending_t	ieee80211.h	/^}tx_pending_t;$/;"	t	typeref:struct:tx_pending_t
tx_probe_rq	ieee80211.h	/^	unsigned int tx_probe_rq;$/;"	m	struct:ieee80211_softmac_stats
tx_probe_rs	ieee80211.h	/^	unsigned int tx_probe_rs;$/;"	m	struct:ieee80211_softmac_stats
tx_retry_limit_exceeded	ieee80211.h	/^	unsigned int tx_retry_limit_exceeded;$/;"	m	struct:ieee80211_stats
tx_single_retry_frames	ieee80211.h	/^	unsigned int tx_single_retry_frames;$/;"	m	struct:ieee80211_stats
tx_timeout	r8192U_core.c	/^void tx_timeout(struct net_device *dev)$/;"	f
tx_unicast_frames	ieee80211.h	/^	unsigned int tx_unicast_frames;$/;"	m	struct:ieee80211_stats
tx_unicast_octets	ieee80211.h	/^	unsigned int tx_unicast_octets;$/;"	m	struct:ieee80211_stats
tx_urb_index	r8192U.h	/^	short  tx_urb_index;$/;"	m	struct:r8192_priv
txb	ieee80211.h	/^	struct ieee80211_txb *txb;$/;"	m	struct:tx_pending_t	typeref:struct:tx_pending_t::ieee80211_txb
txbb_iq_amplifygain	r8192U.h	/^	long	txbb_iq_amplifygain;$/;"	m	struct:_txbbgain_struct
txbbgain_struct	r8192U.h	/^} txbbgain_struct, *ptxbbgain_struct;$/;"	t	typeref:struct:_txbbgain_struct
txbbgain_table	r8192U.h	/^       txbbgain_struct txbbgain_table[TxBBGainTableLength];$/;"	m	struct:r8192_priv
txbbgain_value	r8192U.h	/^	u32	txbbgain_value;$/;"	m	struct:_txbbgain_struct
txbcfail	r819xU_cmdpkt.h	/^	u16	txbcfail;			\/\/$/;"	m	struct:tag_tx_stats_feedback
txbclength	r819xU_cmdpkt.h	/^	u32	txbclength;$/;"	m	struct:tag_tx_stats_feedback
txbcok	r819xU_cmdpkt.h	/^	u16	txbcok;  			\/\/ tx broadcast	$/;"	m	struct:tag_tx_stats_feedback
txbeacondrop	r8192U.h	/^	unsigned long txbeacondrop;$/;"	m	struct:Stats
txbeaconerr	r8192U.h	/^	unsigned long txbeaconerr;$/;"	m	struct:Stats
txbeaconokint	r8192U.h	/^	unsigned long txbeaconokint;$/;"	m	struct:Stats
txbedrop	r8192U.h	/^	unsigned long txbedrop;$/;"	m	struct:Stats
txbeerr	r8192U.h	/^	unsigned long txbeerr;$/;"	m	struct:Stats
txbeokint	r8192U.h	/^	unsigned long txbeokint;$/;"	m	struct:Stats
txbkdrop	r8192U.h	/^	unsigned long txbkdrop;$/;"	m	struct:Stats
txbkerr	r8192U.h	/^	unsigned long txbkerr;$/;"	m	struct:Stats
txbkokint	r8192U.h	/^	unsigned long txbkokint;$/;"	m	struct:Stats
txbroadcast	r8192U.h	/^	unsigned long txbroadcast;$/;"	m	struct:Stats
txbuf_size	ieee80211.h	/^        u16 txbuf_size;$/;"	m	struct:cb_desc
txbytesbroadcast	r8192U.h	/^	unsigned long txbytesbroadcast;$/;"	m	struct:Stats
txbytesmulticast	r8192U.h	/^	unsigned long txbytesmulticast;$/;"	m	struct:Stats
txbytesunicast	r8192U.h	/^	unsigned long txbytesunicast;$/;"	m	struct:Stats
txdatapkt	r8192U.h	/^	unsigned long txdatapkt;$/;"	m	struct:Stats
txerrbroadcast	r8192U.h	/^	unsigned long txerrbroadcast;$/;"	m	struct:Stats
txerrbytestotal	r8192U.h	/^	unsigned long txerrbytestotal;$/;"	m	struct:Stats
txerrmulticast	r8192U.h	/^	unsigned long txerrmulticast;$/;"	m	struct:Stats
txerrtotal	r8192U.h	/^	unsigned long txerrtotal;$/;"	m	struct:Stats
txerrunicast	r8192U.h	/^	unsigned long txerrunicast;$/;"	m	struct:Stats
txfail	r819xU_cmdpkt.h	/^	u16	txfail;				\/\/ Tx Fail count$/;"	m	struct:tag_tx_stats_feedback
txfeedback	r8192U.h	/^	unsigned long txfeedback;$/;"	m	struct:Stats
txfeedbackfail	r8192U.h	/^	unsigned long txfeedbackfail;$/;"	m	struct:Stats
txfeedbackok	r8192U.h	/^	unsigned long txfeedbackok;$/;"	m	struct:Stats
txfeedbackretry	r8192U.h	/^	unsigned long txfeedbackretry;$/;"	m	struct:Stats
txlpdrop	r8192U.h	/^	unsigned long txlpdrop;$/;"	m	struct:Stats
txlperr	r8192U.h	/^	unsigned long txlperr;$/;"	m	struct:Stats
txlpokint	r8192U.h	/^	unsigned long txlpokint;$/;"	m	struct:Stats
txmanagedrop	r8192U.h	/^	unsigned long txmanagedrop;$/;"	m	struct:Stats
txmanageerr	r8192U.h	/^	unsigned long txmanageerr;$/;"	m	struct:Stats
txmanageokint	r8192U.h	/^	unsigned long txmanageokint;$/;"	m	struct:Stats
txmcfail	r819xU_cmdpkt.h	/^	u16	txmcfail;			\/\/	$/;"	m	struct:tag_tx_stats_feedback
txmclength	r819xU_cmdpkt.h	/^	u32	txmclength;	$/;"	m	struct:tag_tx_stats_feedback
txmcok	r819xU_cmdpkt.h	/^	u16	txmcok;  			\/\/ tx multicast$/;"	m	struct:tag_tx_stats_feedback
txmulticast	r8192U.h	/^	unsigned long txmulticast;$/;"	m	struct:Stats
txnpdrop	r8192U.h	/^	unsigned long txnpdrop;$/;"	m	struct:Stats
txnperr	r8192U.h	/^	unsigned long txnperr;$/;"	m	struct:Stats
txnpokint	r8192U.h	/^	unsigned long txnpokint;$/;"	m	struct:Stats
txok	r819xU_cmdpkt.h	/^	u16 	txok;				\/\/ Tx ok count$/;"	m	struct:tag_tx_stats_feedback
txokbytestotal	r8192U.h	/^	unsigned long txokbytestotal;$/;"	m	struct:Stats
txokinperiod	r8192U.h	/^	unsigned long txokinperiod;$/;"	m	struct:Stats
txoktotal	r8192U.h	/^	unsigned long txoktotal;$/;"	m	struct:Stats
txop	ieee80211.h	/^		u16 txop:8;$/;"	m	struct:_frameqos::__anon7
txoverflow	r8192U.h	/^	unsigned long txoverflow;$/;"	m	struct:Stats
txpower_checkcnt	r8192U.h	/^	u32 txpower_checkcnt;$/;"	m	struct:r8192_priv
txpower_count	r8192U.h	/^	u8			   txpower_count;\/\/For 6 sec do tracking again$/;"	m	struct:r8192_priv
txpower_tracking_callback_cnt	r8192U.h	/^	u32 txpower_tracking_callback_cnt;$/;"	m	struct:r8192_priv
txpower_tracking_wq	r8192U.h	/^	struct delayed_work txpower_tracking_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::delayed_work
txpower_tracking_wq	r8192U.h	/^	struct tq_struct txpower_tracking_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::tq_struct
txpower_tracking_wq	r8192U.h	/^	struct work_struct txpower_tracking_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
txqueue2outpipe	r8192U_core.c	/^unsigned int txqueue2outpipe(unsigned int tx_queue) {$/;"	f
txrate	r8192U.h	/^	rt_tx_rahis_t txrate;$/;"	m	struct:Stats
txrdu	r8192U.h	/^	unsigned long txrdu;$/;"	m	struct:Stats
txresumed	r8192U.h	/^	unsigned long txresumed;$/;"	m	struct:Stats
txretry	r819xU_cmdpkt.h	/^	u16 	txretry;			\/\/ Tx Retry count	$/;"	m	struct:tag_tx_stats_feedback
txretrycount	r8192U.h	/^	unsigned long txretrycount;$/;"	m	struct:Stats
txucfail	r819xU_cmdpkt.h	/^	u16	txucfail;			\/\/$/;"	m	struct:tag_tx_stats_feedback
txuclength	r819xU_cmdpkt.h	/^	u32	txuclength;$/;"	m	struct:tag_tx_stats_feedback
txucok	r819xU_cmdpkt.h	/^	u16  txucok;				\/\/ tx unicast$/;"	m	struct:tag_tx_stats_feedback
txunicast	r8192U.h	/^	unsigned long txunicast;$/;"	m	struct:Stats
txvidrop	r8192U.h	/^	unsigned long txvidrop;$/;"	m	struct:Stats
txvierr	r8192U.h	/^	unsigned long txvierr;$/;"	m	struct:Stats
txviokint	r8192U.h	/^	unsigned long txviokint;$/;"	m	struct:Stats
txvodrop	r8192U.h	/^	unsigned long txvodrop;$/;"	m	struct:Stats
txvoerr	r8192U.h	/^	unsigned long txvoerr;$/;"	m	struct:Stats
txvookint	r8192U.h	/^	unsigned long txvookint;$/;"	m	struct:Stats
type	ieee80211.h	/^	u8 type;$/;"	m	struct:eapol
type	r8192U.h	/^                unsigned char type;$/;"	m	struct:rtl_reg_debug::__anon14
u	ieee80211.h	/^	} u;$/;"	m	struct:ieee_param	typeref:union:ieee_param::__anon2
u	r8192U.h	/^	} u;$/;"	m	struct:ipw_param	typeref:union:ipw_param::__anon9
udev	r8192U.h	/^	struct usb_device *udev;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::usb_device
undecorated_smoothed_pwdb	r8192U.h	/^	long	undecorated_smoothed_pwdb;$/;"	m	struct:r8192_priv
unicast_uses_group	ieee80211.h	/^            unicast_uses_group:1,$/;"	m	struct:ieee80211_security
unspec_reason	ieee80211.h	/^	unspec_reason	= 0x1,$/;"	e	enum:_ReasonCode
unsup_RSNIEver	ieee80211.h	/^	unsup_RSNIEver = 0x15,$/;"	e	enum:_ReasonCode
up	r8192U.h	/^	short up;$/;"	m	struct:r8192_priv
update_beacon_wq	r8192U.h	/^	struct delayed_work update_beacon_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::delayed_work
update_beacon_wq	r8192U.h	/^	struct work_struct update_beacon_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
upper_rssi_threshold_ratr	r8192U.h	/^	u32				upper_rssi_threshold_ratr;$/;"	m	struct:_rate_adaptive
urb	r8192U.h	/^	struct urb *urb;$/;"	m	struct:rtl8192_rx_info	typeref:struct:rtl8192_rx_info::urb
usb_kill_urb	r8192U_core.c	77;"	d	file:
value	ieee80211.h	/^			u32 value;$/;"	m	struct:ieee_param::__anon2::__anon3
value	r8192U.h	/^			u32 value;$/;"	m	struct:ipw_param::__anon9::__anon10
value	r819xU_cmdpkt.h	/^	u32	value;				\/* *\/$/;"	m	struct:tag_cmd_pkt_set_configuration
version	ieee80211.h	/^	u8 version;$/;"	m	struct:eapol
version	ieee80211.h	/^        u8 version;$/;"	m	struct:ieee80211_qos_information_element
virtual_address	ieee80211.h	/^	u8*       virtual_address;$/;"	m	struct:ieee80211_rx_stats
wap_set	ieee80211.h	/^	short wap_set;$/;"	m	struct:ieee80211_device
watch_dog_timer	r8192U.h	/^	struct timer_list watch_dog_timer;	$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::timer_list
watch_dog_timer_callback	r8192U_core.c	/^void watch_dog_timer_callback(unsigned long data)$/;"	f
watch_dog_wq	r8192U.h	/^	struct delayed_work watch_dog_wq;    $/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::delayed_work
watch_dog_wq	r8192U.h	/^	struct tq_struct watch_dog_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::tq_struct
watch_dog_wq	r8192U.h	/^	struct work_struct watch_dog_wq;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::work_struct
wmm_info	ieee80211.h	/^        u8 wmm_info;$/;"	m	struct:ieee80211_network
wmm_param	ieee80211.h	/^        struct ieee80211_wmm_ac_param wmm_param[4];$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::ieee80211_wmm_ac_param
worst_rssi	ieee80211.h	/^        int worst_rssi;$/;"	m	struct:ieee80211_device
wpa_enabled	ieee80211.h	/^	int wpa_enabled;$/;"	m	struct:ieee80211_device
wpa_ie	ieee80211.h	/^		} wpa_ie;$/;"	m	union:ieee_param::__anon2	typeref:struct:ieee_param::__anon2::__anon4
wpa_ie	ieee80211.h	/^	u8  wpa_ie[MAX_WPA_IE_LEN];$/;"	m	struct:ieee80211_network
wpa_ie	ieee80211.h	/^	u8 *wpa_ie;$/;"	m	struct:ieee80211_device
wpa_ie	r8192U.h	/^		} wpa_ie;$/;"	m	union:ipw_param::__anon9	typeref:struct:ipw_param::__anon9::__anon11
wpa_ie_len	ieee80211.h	/^	size_t wpa_ie_len;$/;"	m	struct:ieee80211_device
wpa_ie_len	ieee80211.h	/^	size_t wpa_ie_len;$/;"	m	struct:ieee80211_network
wpa_param	ieee80211.h	/^		} wpa_param;$/;"	m	union:ieee_param::__anon2	typeref:struct:ieee_param::__anon2::__anon3
wpa_param	r8192U.h	/^		} wpa_param;$/;"	m	union:ipw_param::__anon9	typeref:struct:ipw_param::__anon9::__anon10
wpax_suitlist_lock	ieee80211.h	/^	spinlock_t wpax_suitlist_lock;$/;"	m	struct:ieee80211_device
wpax_type_notify	ieee80211.h	/^	u32 wpax_type_notify; \/\/{added by David, 2006.9.26}$/;"	m	struct:ieee80211_device
wpax_type_set	ieee80211.h	/^	u8  wpax_type_set;    \/\/{added by David, 2006.9.28}$/;"	m	struct:ieee80211_device
wq	ieee80211.h	/^        struct workqueue_struct *wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::workqueue_struct
write_cam	r8192U_core.c	/^void write_cam(struct net_device *dev, u8 addr, u32 data)$/;"	f
write_nic_byte	r8192U_core.c	/^void write_nic_byte(struct net_device *dev, int indx, u8 data)$/;"	f
write_nic_byte_E	r8192U_core.c	/^void write_nic_byte_E(struct net_device *dev, int indx, u8 data)$/;"	f
write_nic_dword	r8192U_core.c	/^void write_nic_dword(struct net_device *dev, int indx, u32 data)$/;"	f
write_nic_word	r8192U_core.c	/^void write_nic_word(struct net_device *dev, int indx, u16 data)$/;"	f
write_rtl8225	r8180_rtl8225.c	/^void write_rtl8225(struct net_device *dev, u8 adr, u16 data)$/;"	f
write_rtl8225_patch	r8180_rtl8225.c	/^void write_rtl8225_patch(struct net_device *dev, u8 adr, u16 data)$/;"	f
wstats	r8192U.h	/^	struct iw_statistics wstats;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::iw_statistics
wx_sem	ieee80211.h	/^	struct semaphore wx_sem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::semaphore
wx_sem	r8192U.h	/^	struct semaphore wx_sem;$/;"	m	struct:r8192_priv	typeref:struct:r8192_priv::semaphore
wx_sync_scan_wq	ieee80211.h	/^	struct tq_struct wx_sync_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
wx_sync_scan_wq	ieee80211.h	/^        struct work_struct wx_sync_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
xaagccore1	r8192U.h	/^	u8				xaagccore1;$/;"	m	struct:_init_gain
xbagccore1	r8192U.h	/^	u8				xbagccore1;$/;"	m	struct:_init_gain
xcagccore1	r8192U.h	/^	u8				xcagccore1;$/;"	m	struct:_init_gain
xdagccore1	r8192U.h	/^	u8				xdagccore1;$/;"	m	struct:_init_gain
